Zynq_7030 Development System FII-PE7030
System Design Objective The main purpose of this system design is to complete FPGA learning, development and experiment with Xilin-Vivado. The main device uses the XC7Z030-1FFG676C. The main learning and development projects can be completed as follows: （1）Basic FPGA design training （2）Construction and training of the SOPC (Microblaze) system （3）IC design and verification, the system provides hardware design, simulation and verification of RISC-V CPU. （4）Based on RISC-V development and application. （5）The system is specifically optimized for hardware design for RISC-V system applications. 2、System Resource Extended memory: two DDR3 (PL end)…
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