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- RISC-V C Programming 1 （1）Introduction to FII-RISC-V CPU and C Project Compilation Process
- Simple Character Device Driver Code Explanation
- Using PetaLinux to Transfer a Linux System
- Using NFS to Transfer Files and Boot Remotely
- Ubuntu Network Connections Guide in FPGA Board Development Environment
- Step by Step Installation of PetaLinux on Ubuntu via VirtualBox in FPGA Development Board
- How to Use RCP, SCP, and TFTP 6 With FII-PE7030, FII-BD7100 Development Board
- Linux Network File Transfer Using RCP, SCP, and Using WinSCP to Transfer Files Between Windows and Linux 5
- Basic Introduction to Device Tree Driver Development
- Altera JTAG Setup & Troubleshooting
- FII-PE7030 FPGA Development Board and Educational Platform Experimental Manual and Haredware Reference Guide
- AD9371
- RISC-V Instruction Set Explanation
- Combined With the BCD_Counter Project to Achieve the Display of the Digital Clock, Master the Design Method of Graphics From Top to Bottom – Block/SCH – Altera Risc-V Board PRA040 Experimental 4
- Frequency Division Design, Learn the BCD Code Counter, Digital Display Decoding Design, Segment Display – Altera Risc-V Board PRA040 Experimental 3
- Learn to Analyze the Captured Signals, Practice the Use of SignalTap Logic Analyzer in Quartus – SignalTap – Altera Risc-V Board PRA040 Experimental 2
- Master the Design of the Frequency Divider to Implement the Shifting – LED LED Shifting – Altera Risc-V Board PRA040 Experimental 1
- Understand What Ethernet is and How it Works, the Relationship Between Different Interface Types (MII, GMII, RGMII) , Ethernet Experiment – FPGA Beginner Study Board PRA006, PRA010 Experiment 14
- Design a simple customized VGA image display, Master the principle of VGA implementation, VGA Experiment – FPGA Beginner Study Board PRA006, PRA010 Experiment 13
- The knowledge of the IIC protocol, the Theory of AD Conversion, AD, DA Experiment – FPGA Beginner Study Board PRA006, PRA010 Experiment 12
- Reading and Writing EEPROM, the Basic Principles of Asynchronous IIC Bus, the IIC Communication Protocol, IIC transmitting Experiment – FPGA Beginner Study Board PRA006, PRA010 Experiment 11
- Asynchronous Serial Port Communication, Handshake Mechanism and Data Frame Strcuture, Asynchronous Serial Port Design and Experiment – FPGA Beginner Study Board PRA006, PRA010 Experiment 10
- Configure and Use Dual-port RAM, Use Dual_port RAM to Read and Write Frame Data – FPGA Beginner Study Board PRA006, PRA010 Experiment 9
- Study the Format of *.mif File and How to Edit *.mif File ，Study the Internal Memory Block of FPGA，Use of ROM – FPGA Beginner Study Board PRA006, PRA010 Experiment 8
- Binary Numbers or Hexadecimal Number to BCD Code Conversion and Application – FPGA Beginner Study Board PRA006, PRA010 Experiment 7
- Use ModelSim Simulation to Design Output, Use of Multipliers and ModelSim Simulation – FPGA Beginner Study Board PRA006, PRA010 Experiment 6
- Button Debounce Principle and Adaptive Programming – Button Debounce Experiment – FPGA Beginner Study Board PRA006, PRA010 Experiment 5
- Building new FPGA Projects in Quartus, Device Selection, PLL setup, PLL Frequency Setting, Verilog’s Tree Hierarchy Design, and the Use of SignalTap II – Block/SCH Experiment – FPGA Beginner Study Board PRA006, PRA010 Experiment 4
- Use the BCD Code Counter, Digital Display Decoding Design, the Serial Flash, – Segment Display – FPGA Beginner Study Board PRA006, PRA010 Experiment 3
- The Use of SignalTap Logic Analyzer, Analyze the Captured Signals – FPGA Beginner Study Board PRA006, PRA010 Experiment 2
- LED shifting, Using Quartus, the Writing of Verilog HDL programs, Mange FPGA Pin Assignment – FPGA Beginner Study Board PRA006, PRA010 Experiment 1
- FPGA for Beginner Board Experimental Manuals and Study Guide – PRA006, PRA010 FPGA Beginner Study Board
- C Programming (2) on RISCV FII-PRX100 (ARTIX-7, XC7A100T) XILINX FPGA Board with our FII-Risc-V CPU (RV32G2.0)
- C Programming (1) on RISCV FII-PRX100 (ARTIX-7, XC7A100T) XILINX FPGA Board with our FII-Risc-V CPU (RV32G2.0)
- Risc-V Bus and PipeLine – FII Risc-V Bus and Pipeline Design – Risc-V Tutorial and Exercise
- FII RISC-V3.01 CPU Processor on FII-PRX100-S (ARTIX-7, XC7A100T) XILINX FPGA Board Evaluation by Coremark and Dhrystone Benchmarks
- Dhrystone Porting Guide For FII RISC-V3.01 CPU Processor on FII-PRX100-S (ARTIX-7, XC7A100T) XILINX FPGA Board
- FII RISC-V3.01 CPU Processor on FII-PRX100-S (ARTIX-7, XC7A100T) XILINX FPGA Board Coremark Porting Guide
- Xinlix Risc-V Board PRX100-S, PRX100-D Experimental Manuals (2019-12-19 Version ) with twenty experiments
- DAC9767 DDS Signal Source Experiment – Xilinx Risc-V Board FII-PRX100 Experiment 20
- High-speed ADC9226 Acquisition Experiment – Xilinx Risc-V Board FII-PRX100 Experiment 19
- Photo Display Experiment of OV5640 Camera , Understand the power-on sequence of the OV5640 camera and the corresponding register configuration process – Xilinx Risc-V Board FII-PRX100 Experiment 18
- Reading Experiment of Serial Port Partition of Static Memory SRAM, Read and write timing of IS61WV25616BLL SRAM, and prepare for the next experimental experiment of OV5640 camera experiment – – Xilinx Risc-V FII-PRX100 Board Experiment 17
- Audio 8978 Loopback Experiment – What is I2S (Inter-IC Sound) bus and how it works – AWM8978 Audio Boardudio – Xilinx Risc-V FII-PRX100 Board Experiment 16
- How ethernet work and familiar with MII, GMII, RGMII interface types – FII-PRX100 Risc-V Board Experiment 15
- ASM Test Introduction
- DAC9767 DDS Signal Source Experiment, AD9767 datasheet and use the AD9767 to design a signal source that can generate sine, square, triangle, and sawtooth waves – FII-PRA040 Altera Risc-V Experiment 19
- Atera Risc-V FII-PRA040 Experimental Manuals ( 1- 20 ) PDF Version 2019-12-30
- High-speed ADC9226 Acquisition Experiment (FII-BD9226) – parallel ADC collectors and master the use of ADC9226 – FII-PRA040 Altera Risc-V Experiment 18
- OV5640 Camera Photo Display Experiment, IIC bus, HDMI, Understand the power-on sequence of the OV5640 – FII-PRA040 Altera Risc-V Experiment 17
- Audio 8978 Loopback Experiment (WM8978 Audio Sub Development Board) , How I2S (Inter-IC Sound) bus work ? – – FII-PRA040 Altera Risc-V Tutorial Experiment 16
- How does SRAM read and write work ? Review frequency division, button debounce, and hex conversion experiment – FII-PRA040 Altera Risc-V Tutorial Experiment 15
- How does Ethernet work? MII, GMII, RGMII interface advantages and disadvantages, Perform a loopback test, FII-PRA040 Altera Risc-V Tutorial Experiment 14
- Learn HDMI principle, Introduction to HDMI and ADV7511 Chip, HDMI Display, FII-PRA040 Altera Risc-V tutorial Experiment 13
- FII-PRA040 User Experimental Manuals ( 2020-09-28 Updated )
- FII-PRX100T User Experiment Manuals （newly updated 2020-09-28)
- FII-BD9361 (AD-FMCOMMS3-EBZ Board Compatible) Hardware Configuration
- xc7z030 board hardware resources and block diagram of ZYNQ chip
- What is the main components of the FRA006 FPGA beginner board with JTAG downloader ?
- What is the features and benefits of your FII-BD9361 (AD-FMCOMMS3-EBZ compatible ) boards ?
- Ethernet work mechanism, the relationship between different interface types (MII, GMII, RGMII), leanrn how to transmission and reception of data, zynq xc7z030 board – FII-PE7030 Experiment 13
- IIC protocol knowledge，Learn HDMI theory – zynq xc7z030 board – FII-PE7030 Experiment 12 – HDMI Experiment
- asynchronous IIC bus, and the IIC communication protocol， reading and writing EEPROM – zynq xc7z030 board – FII-PE7030 Experiment 11 – IIC Protocol Transmission
- zynq xc7z030 board – FII-PE7030 Experiment 10 – Asynchronous Serial Port Design and Experiment
- zynq xc7z030 board – FII-PE7030 Experiment 9 – Use Dual-port RAM to Read and Write Frame Data
- zynq xc7z030 board – FII-PE7030 Experiment 8 – Use of ROM, Study the format of *.coe and how to edit *.coe file to configure the contents of ROM
- Binary numbers to BCD (bin_to_bcd), Hexadecimal Number to BCD (hex_to_bcd) Code Conversion and Application – zynq xc7z030 board – FII-PE7030 Experiment 7
- zynq xc7z030 board – FII-PE7030 Experiment 6 – Use of Multipliers and ISIM
- zynq xc7z030 board – FII-PE7030 Experiment 5 – Digital Clock Comprehensive Experiment
- Learn button debounce principle and adaptive programming, Zynq_7030 button hardware circuit – zynq xc7z030 board – FII-PE7030 Experiment 4 – Button Debounce
- BCD decoder, Display design of hexadecimal to 7 segment display decoders, Achieve digital clock display – zynq xc7z030 board – FII-PE7030 Experiment 3 – Segment Display Digital Clock Experiment
- Learn to use ILA (Integrated Logic Analyzer) in Vivado, Practice the call of system resource PLL, zynq xc7z030 board – FII-PE7030 Experiment 2
- zynq xc7z030 board – use Vivado to establish a new project, call the system resource PLL to establish the clock， Write Verilog HDL program to achieve frequency division and implement LED shifting，FII-PE7030 Experiment 1 LED Shifting Design
- zynq_7030 Main Resources Usage and FPGA Development Experiemnt
- Zynq_7030 Development System FII-PE7030
- EVB Board – Basic FPGA design training – FII-PE7030 User Experimental Manuals
- FII-PE7030 Hardware Reference Guide
- RISC-V FPGA Board Study Guide – FII-PRX100 Experimental Manuals
- FPGA evb – $59 – Cyclone 10 with User Experimental Manual
- AD,DA Experiment , write the data into PCF8591, Read the value of AD acquisition from PCF8591, – FII-PRA040 FPGA Board Experimental 12 – Altera Risc-V FPGA Tutorial :
- Learning the basic principles of asynchronous IIC bus, and the IIC communication protocol, reading and writing EEPROM – Altera Risc-V IIC Protocol Transmission FPGA Tutorial – FII-PRA040 FPGA Board Experimental 11
- Asynchronous serial port communication, handshake mechanism, data frame, Asynchronous Serial Port Design and Experiment – FII-PRA040 Risc-V FPGA Board Experimental 10
- Altera Risc-V FPGA Tutorial : Use Dual-port RAM to Read and Write Frame Data – FII-PRA040 FPGA Board Experimental 9
- Altera Risc-V FPGA Tutorial : Use of ROM – Study the format of *.mif and how to edit *.mif file，Learn to use RAM, read and write RAM， FII-PRA040 FPGA Board Experimental 8
- Altera Risc-V FPGA Tutorial : Hexadecimal Number to BCD Code Conversion and Application – FII-PRA040 FPGA Board Experimental 7
- Use multiplier, Use ModelSim to simulate design output, Use of Multipliers and ModelSim – FII-PRA040 Altera Risc-V FPGA Board Experimental 6
- The design process of the shifting LED, debounce principle and adaptive programming, button hardware circuit, Button Debounce Programming – FII-PRA040 Risc-V FPGA Board Experimental 5
- Building FPGA projects in Quartus, device selection, PLL creation, PLL frequency setting, Verilog’s tree hierarchy design, and the use of SignalTap II, Block/SCH – FII-PRA040 Risc-V FPGA Board Experimental 4
- BCD code counter, Digital display decoding design, the serial FLASH of the development board : Segment Display – FII-PRA040 Risc-V FPGA Board Experimental 3
- SignalTap Logic Analyzer in Quartus, analyze the captured signals, – FII-PRA040 FPGA Board Experimental 2 – Risc-V FPGA Board Tutorial
- use Quartus II to create projects，FPGA pin assignment， program downloading， writing of Verilog HDL programs， Altera Risc-V FPGA Tutorial : LED shifting – FII-PRA040 FPGA Board Experimental 1
- SOPC (NiosII) system, simulation and verification of RISC-V CPU, Basic FPGA design training, IC design and verification – Altera Risc-V Board Tutorial : Introduction of FII-PRA040 Development System
- Understand the register configuration of the ADV7511, HDMI Graphic Display Experiment – Xilinx Risc-V Board Tutorial : FII-PRX100 FPGA Board Experiment 14
- digital-to-analog conversion: DAC, analog-to-digital conversion: ADC – Xilinx Risc-V Board Tutorial : AD, DA Experiment – FII-PRX100 FPGA Board Experiment 13
- Learning the basic principles of the different IIC bus, mastering the IIC communication protocol, Xilinx Risc-V Board Tutorial : IIC Protocol Transmission – FII-PRX100 FPGA Board Experiment 12
- Xilinx Risc-V Board Tutorial : Asynchronous Serial Port Design and Experiment – FII-PRX100 FPGA Board Experiment 11
- Xilinx Risc-V Board Tutorial : Use Dual_port RAM to Read and Write Frame Data – FII-PRX100 FPGA Board Experiment 10
- Study the internal memory block of FPGA, Study the format of *.mif and how to edit *.mif file to configure the contents of ROM : Use of ROM – FII-PRX100 Risc-V FPGA Board Experiment 9
- Xilinx Risc-V Board Tutorial : Hexadecimal Number to BCD Code Conversion and Application – FII-PRX100 FPGA Board Experiment 8
- Xilinx Risc-V Board Tutorial : Multiplier Use and ISIM Simulation- FII-PRX100 FPGA Board Experiment 7
- Xilinx Risc-V Board Tutorial : Digital Clock Comprehensive Design Experiment- FII-PRX100 FPGA Board Experiment 6
- Xilinx Risc-V Board Tutorial : Button Debounce Design and Experimental- FII-PRX100 FPGA Board Experiment 5
- JTAG Configuration Description – FII-PRA010 – Cyclone-10 FPGA Development Board with Jtag Embeded
- JTAG Configuration Description – FII-PRA006 – Cyclone-10 FPGA Development Board with Jtag Embeded
- Xilinx Risc-V Board Tutorial : Block/SCH Digital Clock Design- FII-PRX100 FPGA Board Experiment 4
- Xilinx Risc-V Board Tutorial : Basic Digital Clock Experiment and Programming of FPGA Configuration Files- FII-PRX100 FPGA Board Experiment 3
- Xilinx Risc-V Board Tutorial : Switches and Display – FII-PRX100 FPGA Board Experiment 2
- Verilog HDL program to achieve frequency division, Write Verilog HDL program to implement LED shifting – Risc-V FPGA Board Xilinx – Development Board Experiment 1 – LED Shifting – FII-PRX100
- xilinx Risc-V FPGA Board – FII-PRX100 – FPGA Development Board System Introduction
- FPGA Board for beginner – FII-PRA006/010 Hardware Reference Guide
- interface types (MII, GMII, RGMII) advantages and disadvantages – Ethernet Experiment – FPGA Board for Beginner – Experiment 14
- FPGA Beginner Tutorial – VGA Experiment – FPGA Board for Beginner – Experiment 13
- FPGA Beginner Tutorial – AD, DA Experiment – FPGA Board for Beginner – Experiment 12
- FPGA Beginner Tutorial – IIC Protocol Transmission – FPGA Board for Beginner – Experiment 11
- FPGA Tutorial – Asynchronous Serial Port Design and Experiment – FPGA for Beginner – Experiment 10
- Use Dual-port RAM to Read and Write Frame Data, use synchronous (or asynchronous ) clock to control the synchronization of frame structure – FPGA Board Beginner Tutorial – Experiment 9
- Design 16 outputs ROM, Study the format of *.mif and how to edit *.mif file to configure the contents of ROM, Use of ROM (Read-only Memory) – FPGA Board for Beginner Tutorial – Experiment 8
- Hexadecimal Numbers to BCD Code(hex_to_bcd), binary numbers to BCD code (bin_to_bcd) Conversion and Application – FPGA Board for Beginner Tutorial – Experiment 7
- Learn to Use Multiplier and ModelSim to Output- FPGA Board for Beginner – FPGA Tutorial – Experiment 6
- Block_Debouncing Principle and adaptive programming, PCB schematics, and Verilog HDL Code – FBGA Board for beginner FPGA tutorial – Experiment 5
- Building new FPGA projects in Quartus, device selection, PLL setup, PLL frequency setting, Verilog’s tree hierarchy design, and the use of SignalTap II – FPGA Board for Beginner – Experiment 4 -PRA006
- BCD_counter, The segment decoder code, Download the program into the board flash memory – FPGA for Beginner Tutorial – Experiment 3 – FII-PRA006
- Switch and Use SignalTap II Logic Analyzer in Quartus ( Verilog HDL code ), Learn to analyze the captured signals – FPGA for Beginner Tutorial – Experiment 2 – FII-PRA006
- LED_shifting , Frequency Divider Verilog HDL Code using the development software Quartus, FPGA pin assignment – FPGA Board Beginner Tutorial – FII-PRA006 Experiment 1
- FPGA Board for Beginner
- Analog Devices AD9361 RF Agile Transceiver™ and AD9361 Development Board