zynq xc7z030 board

BCD decoder, Display design of hexadecimal to 7 segment display decoders, Achieve digital clock display – zynq xc7z030 board – FII-PE7030 Experiment 3 – Segment Display Digital Clock Experiment

Achieve digital clock display, BCD decoder, bitstream files, Display design of hexadecimal to 7 segment display decoders, FII-PE7030, pin assignment of FPGA, the design of frequency divider, Verilog tree hierarchy, zynq xc7z030 board, Zynq_7030 development board

3.1 Experiment Objective Review the contents of experiment 1 and experiment 2, master the configuration of PLL, the design of frequency divider, the principle of schematics and the pin assignment of FPGA. Familiar with the design of Verilog’s tree hierarchy Study BCD decoder Display design of hexadecimal to 7 segment display decoders Achieve digital clock display 3.2 Experiment Implement The display decoder has two lower digits to display seconds, the middle two digits to display minutes, and the highest two digits to display hours. Separate the seconds, minutes, and hours…

Debugging results - Analysis of Switch Signals via ILA

Experimental Manuals FII-PE7030 FPGA Products

Learn to use ILA (Integrated Logic Analyzer) in Vivado, Practice the call of system resource PLL, zynq xc7z030 board – FII-PE7030 Experiment 2

Integrated Logic Analyzer, Switch Signals, xc7z030 board, zynq xc7z030 board

Experiment 2 Analysis of Switch Signals via ILA 2.1 Experiment Objective Continue to practice using develop board Continue to practice the call of system resource PLL Learn to use ILA (Integrated Logic Analyzer) in Vivado 2.2 Experiment Implement Capture and analyze switch signals on the development board by using ILA 2.3 Experiment 2.3.1 Introduction of Switches The on-board switch is 8 DIP switches, as shown in Figure 2.1. The switch is used to switch the circuit by turning the switch handle. Figure 2.1 Switch physical picture 2.3.2 Hardware Design The…

Experimental Manuals FII-PE7030 FPGA Products Risc-V

zynq xc7z030 board – use Vivado to establish a new project, call the system resource PLL to establish the clock， Write Verilog HDL program to achieve frequency division and implement LED shifting，FII-PE7030 Experiment 1 LED Shifting Design

LED shifting, zynq xc7z030 board

Experiment 1 LED Shifting Design 1.1 Experiment Objective Practice how to use the development system software Vivado to establish a new project, call the system resource PLL to establish the clock. Write Verilog HDL program to achieve frequency division and implement LED shifting Combine hardware resources for FPGA pin configuration Compile, download the program to the develop board, and verify Observe the experimental result and debug the project 1.2 Experiment Implement All LEDs light up during reset; After reset, LED lights from low to high (from right to left) in…