Study the internal memory block of FPGA, Study the format of *.mif and how to edit *.mif file to configure the contents of ROM : Use of ROM – FII-PRX100 Risc-V FPGA Board Experiment 9

% function : create .coe

clear all;

close all;

clc;

depth= 256;

width =16;

fid_s = fopen(‘test_rom.coe’, ‘w+’);

fprintf(fid_s, ‘MEMORY_INITIALIZATION_RADIX = %d;\n’,width);

fprintf(fid_s, ‘%s\n’, ‘MEMORY_INITIALIZATION_VECTOR =’);

for i=0:depth–1

data =i*i;

b=dec2hex(data);

fprintf(fid_s, ‘%s’, b);

fprintf(fid_s, ‘%s\n’, ‘,’);

end

fclose(fid_s);

disp(‘=======mif file completed========’);

input rst,

input inclk,

input [7:0] sw,

output reg[5:0] scan,

output reg[6:0] seven_sega

);

wire [15:0] rom_q;

wire sys_clk;

wire BD_clk;

wire sys_rst;

wire u_f;

wire m_f;

wire sf;

reg [7:0] count;

reg [5:0] counta;

reg [6:0] seven_seg_ra;

wire [3:0] ones;

wire [3:0] tens;

wire [3:0] hundreds;

wire [3:0] thousands;

wire [3:0] ten_thousands;

reg [3:0] ones_r;

reg [3:0] tens_r;

reg [3:0] hundreds_r;

reg [3:0] thousands_r;

reg [3:0] ten_thousands_r;

reg [3:0] ones_x;

reg [3:0] tens_x;

reg [3:0] hundreds_x;

reg [3:0] thousands_x;

reg [3:0] ten_thousands_x;

always@(posedge BCD_clk)

begin

ones_x <= ones;

tens_x <= tens;

hundreds_x <= hundreds;

thousands_x <= thousands;

ten_thousands_x <= ten_thousands;

end

always@(posedge sys_clk)

if(sys_rst)

begin

count <= 0;

ones_r <= 0;

tens_r <= 0;

hundreds_r <= 0;

thousands_r <= 0;

ten_thousands_r <= 0;

end

else if(s_f)

begin

count <= count+1;

ones_r <= ones_x;

tens_r <= tens_x;

hundreds_r <= hundreds_x;

thousands_r <= thousands_x;

ten_thousands_r <= ten_thousands_x;

end

reg ext_rst;

always@(posedge sys_clk)

ext_rst<=rst;

reg [2:0] scan_st;

always@(posedge sys_clk)

if(!ext_rst)

begin

scan<=6’b11_1111;

counta<=4’b0;

scan_st<=0;

end

else case(scan_st)

0 : begin

scan <= 6’b11_1110;

counta <= ones_r;

if( ms_f )

scan_st <= 1;

end

1 : begin

scan <=6’b11_1101;

counta <=tens_r;

if ( ms_f )

scan_st<=2;

end

2 : begin

scan <=6’b11_1011;

counta <=hundreds_r;

if(ms_f)

scan_st<=3;

end

3 : begin

scan <=6’b11_0111;

counta <=thousands_r;

if(ms_f)

scan_st<=4;

end

4 : begin

scan <=6’b10_1111;

counta <=ten_thousands_r;

if(ms_f)

scan_st<=5;

end

5 : begin

scan <=6’b01_1111;

counta <=0;

if (ms_f)

scan_st<=0;

end

default:scan_st<=0;

endcase

always@(*)

case(counta)

0 : seven_sega <= 7’b100_0000 ;

1 : seven_sega <= 7’b111_1001 ;

2 : seven_sega <= 7’b010_0100 ;

3 : seven_sega <= 7’b011_0000 ;

4 : seven_sega <= 7’b001_1001 ;

5 : seven_sega <= 7’b001_0010 ;

6 : seven_sega <= 7’b000_0010 ;

7 : seven_sega <= 7’b111_1000 ;

8 : seven_sega <= 7’b000_0000 ;

9 : seven_sega <= 7’b001_0000 ;

default: seven_sega<=7’b100_0000 ;

endcase

pll_sys_rst pll_sys_rst_inst(

.clk_in(inclk),

.sys_clk(sys_clk),

.BCD_clk(BCD_clk),

.sys_rst(sys_rst)

);

us_ms_s_div us_ms_s_div_inst

(

.sys_rst(sys_rst),

.sys_clk(sys_clk),

.us_f (us_f),

.ms_f (ms_f),

.s_f (s_f)

);

reg [15:0] rom_q_r;

always@(posedge BCD_clk)

rom_q_r<=rom_q;

HEX_BCD HEX_BCD_inst(

.hex (rom_q_r),

.ones (ones),

.tens (tens),

.hundreds (hundreds),

.thousands (thousands),

.ten_thousands (ten_thousands)

);

rom16x256 rom16x256_inst (

.clka(sys_clk), // input wire clka

.addra(sw), // input wire [7 : 0] addra

.douta(rom_q) // output wire [15 : 0] douta

);

endmodule