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FPGA tutorial – Block_debouncing – FBGA Board for for beginner – Experiment 5

5.1 Experiment Objective

  1. Review the design process of running LED
  2. Learn the principle of button debounce and designing of adaptive programming
  3. Learn the connection and used of the Fii-PRA010 button
  4. Integrated application of button debounce, and furthermore development design

 

5.2 Experiment

  1. Bouncing button principle
Button bounce principle
Button bounce principle

Usually, the switches used for the buttons are mechanical elastic switches. When the mechanical contacts are opened and closed, due to the elastic action of the mechanical contacts, a push button switch does not immediately turn on when closed, nor is it off when disconnected. Instead, there is some bouncing when connecting and disconnecting. See Fig 5. 1

The length of the button’s stable closing time is determined by the operator. It usually takes more than 100ms. If you press it quickly, it will reach 40-50ms. It is difficult to make it even shorter. The bouncing time is determined by the mechanical characteristics of the button. It is usually between a few milliseconds and tens of milliseconds. To ensure that the program responds to the button’s every on and off, it must be debounced. When the change of the button state is detected, it should not be immediately responding to the action, but waiting for the closure or the disconnection to be stabilized before processing. Button debounce can be divided into hardware debounce and software debounce.

In most of cases, we use software or programs to achieve debounce. The simplest debounce principle is to wait for a delay time of about 10ms after detecting the change of the button state, and then perform the button state detection again after the bounce disappears. If the state is the same as the previous state just detected, the button can be confirmed. The action has been stabilized. This type of detection is widely used in traditional software design. However, as the number of button usage increases, or the buttons of different qualities will react differently. If the delay is too short, the bounce cannot be filtered out. When the delay is too long, it affects the sensitivity of the button.

This chapter introduces an adaptive button debounce method: starts timing when a change in the state of the button is detected. If the state changes within 10ms, the button bouncing exists. It returns to the initial state, clears the delay counter, and re-detects the button state until the delay counter counts to 10ms. The same debounce method is used for pressing and releasing the button.

The flow chart is shown in Fig 5. 2.

  1. Code for button debouncing

Verilog code is as follows:


module pb_ve(
input sys_clk, // 100 Mhz
input sys_rst, //
input ms_f, //
input keyin, // Input status of the key
output keyout //Output status of key. Every time releasing the button, only one system
//clock pulse outputs
);
reg keyin_r; //Input latch to eliminate metastable
reg keyout_r;//
//push_button vibrating elemination
reg [1:0] ve_key_st; //State machine status bit
reg [3:0] ve_key_count; //delay counter
always@(posedge sys_clk)
keyin_r<=keyin; // Input latch to eliminate metastable
always@(posedge sys_clk)
if(sys_rst) begin
keyout_r <=1'b0;
ve_key_count <=0;
ve_key_st <=0;
end
else case(ve_key_st)
0:begin
keyout_r<=1'b0;
ve_key_count <=0;
if(keyin_r)
ve_key_st <=1;
end
1:begin
if(!keyin_r)
ve_key_st <=0;
else begin
if(ve_key_count==10) begin
ve_key_st <=2;
end
else if(ms_f)
ve_key_count<=ve_key_count+1;
end
end
2:begin
ve_key_count <=0;
if(!keyin_r)
ve_key_st <=3;
end
3:begin
if(keyin_r)
ve_key_st <=2;
else begin
if(ve_key_count==10) begin
ve_key_st <=0;
keyout_r<=1'b1; //After releasing debounce, output a //synchronized clock pulse
end
else if(ms_f)
ve_key_count<=ve_key_count+1;
end
end
default:;
endcase
assign keyout=keyout_r;
endmodule

Case 0 and 1 debounce the button press state. Case 2 and 3 debounce the button release state. After finishing the whole debounce procedure, the program outputs a synchronized clock pulse.

  1. Button debounce flow chart

Button debounce flow chart
Button debounce flow chart

Fig 5. 2 Button debounce flow chart

  1. Combine running LED design and modify the button debounce.
    1. Build new project
    2. Create a PLL symbol
    3. Create a button debounce symbol (See the Verilog HDL code in this experiment)
    4. Create a running LED symbol

//Verilog code

</pre>
module Led_shifting(

input rst,

input sys_clk,

input key_left,

input key_right,

input s_f,

output reg [7:0] led

);

reg ext_rst;

always@(posedge sys_clk) begin

ext_rst<=rst;

end

always@(posedge sys_clk)

if(ext_rst)begin

led<=8'hff;

end

else begin

if(key_left) begin

if(led==8'hff)

led<=8'b0000_0001;

else

led<={led[6:0],led[7]};

end

else if(key_right) begin

if(led==8'hff)

led<=8'b1000_0000;

else

led<={led[0],led[7:1]};

end

end

endmodule

    1. Create top level file and combine each symbol referring to Experiment 4. See Fig 5. 3

    2. Pin assignment

Signal Name

Port Description

Network Label

FPGA Pin

left

Left shift signal

KEY0

3

right

Right shift signal

KEY1

7

rst

Reset signal

KEY2

10

Table 5. 1 Pin assignment

One more thing to mention is that in the I/O Standard column, select 3.3-V LVCMOS instead of 2.5 V

          g. Compile

          h. Download the program to the board

i. Observe the testing result, to see whether every time pressing a button, LED will move towards the corresponding direction. PB3 is reset, PB1 is to move to the left, and PB2 is to move to the right. (block_debouncing Quartus II project files can be referred).

Top level design
Top level design

Fig 5. 3 Top level design

Button PCB schematics. See Fig 5. 4
PCB schematics

PCB schematics
PCB schematics

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