FPGA Board Based

FII RISC-V3.01 CPU Processor on FII-PRX100-S (ARTIX-7, XC7A100T) XILINX FPGA Board Coremark Porting Guide

Coremark Porting, CPU Processor, FII-PRX100-S, Risc-V, RISC-V3.01, XILINX FPGA Board

V1.1 Fraser Innovation inc FII RISC-V3.01 on FII-PRX100-S (ARTIX-7, XC7A100T) XILINX FPGA Board Coremark Porting Guide Version Control Version Date Description 1.0 09/29/2020 Initial Release 1.1 10/06/2020 Add Comparison Figure and Full Description of PRX100 Copyright Notice: © 2020 Fraser Innovation Inc ALL RIGHTS RESERVED Without written permission of Fraser Innovation Inc, no unit or individual may extract or modify part of or all the contents of this manual. Offenders will be held liable for their legal responsibility. Thank you for purchasing the FPGA development board. Please read the manual…

Experimental Manuals FII-PRX100-S FII-PRX100D FPGA Board Based PRX100 Risc-V

Xinlix Risc-V Board PRX100-S, PRX100-D Experimental Manuals (2019-12-19 Version ) with twenty experiments

Experimental Manuals, PRX100-D, PRX100-S, Risc-V Board, Xinlix

Xinlix Risc-V Board PRX100-S, PRX100-D Experimental Manuals (2019-12-19 Version ) with twenty experiments

Experimental Manuals FII-PRX100-S FII-PRX100D FPGA Board Based FPGA Tutor PRX100 Risc-V

DAC9767 DDS Signal Source Experiment – Xilinx Risc-V Board FII-PRX100 Experiment 20

AD9767 datasheet, DDS Introduction, DDS Signal Source Experiment, Direct Digital Synthesizer)

Experiment 20 DAC9767 DDS Signal Source Experiment 20.1 Experiment Objective Learn about DDS (Direct Digital Synthesizer) related theoretical knowledge. Read the AD9767 datasheet and use the AD9767 to design a signal source that can generate sine, square, triangle, and sawtooth waves. 20.2 Experiment Implement Learn about DDS theoretical knowledge. On the basis of understanding the principle of DDS, combined with the theoretical knowledge, use AD9767 module and development board to build a signal source whose waveform, amplitude and frequency can be adjusted. (There are no specific requirements for the adjustment…

Signal waveform of AD9226 captured by logic analyzer

Experimental Manuals FII-PRX100-S FII-PRX100D FPGA Board Based FPGA Tutor PRX100 Risc-V

High-speed ADC9226 Acquisition Experiment – Xilinx Risc-V Board FII-PRX100 Experiment 19

AD acquisition sub-module, ADC9226 Acquisition Experiment

Experiment 19 High-speed ADC9226 Acquisition Experiment 19.1 Experiment Objective Learn about parallel ADC collectors and master the use of ADC9226. 19.2 Experiment Implement 1. Insert the ADC9226 module face up into the FPGA development board to the GPIO2 and GPIO1 ports which are next to the red-green audio module. Write programs to use this module to test 19.3 Experiment 19.3.1 ADC9226 Module Introduction ADC9226 module adopts AD9226 chip design of ADI Company. This chip is a monolithic, 12-bit, 65 MSPS analog-to-digital converter (ADC). It uses a single power supply and…

Experimental Manuals FII-PRX100-S FII-PRX100D FPGA Board Based PRX100 Risc-V

Photo Display Experiment of OV5640 Camera , Understand the power-on sequence of the OV5640 camera and the corresponding register configuration process – Xilinx Risc-V Board FII-PRX100 Experiment 18

HDMI, IIC bus, OV5640 Camera, OV5640 datasheet, OV5640 related registers, power-on timing diagram

Experiment 18 Photo Display Experiment of OV5640 Camera 18.1 Experiment Objective Understand the power-on sequence of the OV5640 camera and the corresponding register configuration process when outputting images of different resolutions Review previous knowledge of IIC bus Review previous knowledge of HDMI 18.2 Experiment Implement Read the power-on sequence of the OV5640 datasheet, and correctly write the power-on control program according to the peripheral module schematics. Correctly write the configuration program of the OV5640 camera with a resolution of 640X480 according to the timing requirements of the SCCB interface Based…

Experimental Manuals FII-PRX100-S FII-PRX100D FPGA Board Based PRX100 Risc-V

Reading Experiment of Serial Port Partition of Static Memory SRAM, Read and write timing of IS61WV25616BLL SRAM, and prepare for the next experimental experiment of OV5640 camera experiment – – Xilinx Risc-V FII-PRX100 Board Experiment 17

18-bit address, 32-bit data space, IS61WV25616BLL SRAM, Serial Port Partition, SRAM, Static Memory SRAM

Experiment 17 Reading Experiment of Serial Port Partition of Static Memory SRAM 17.1 Experiment Objective Learn about static memory SRAM read and write operations and how it works Familiar with the read and write timing of IS61WV25616BLL SRAM, and prepare for the next experimental experiment of OV5640 camera experiment. 17.2 Experiment Implement The experimental board is equipped with two pieces of SRAM, which are combined to form 18-bit address lines and 32-bit data spaces. After power-on, the FPGA will write the same value in the corresponding address in the entire…

FII-PRX100-S FII-PRX100D FPGA Board Based PRX100 Risc-V

Audio 8978 Loopback Experiment – What is I2S (Inter-IC Sound) bus and how it works – AWM8978 Audio Boardudio – Xilinx Risc-V FII-PRX100 Board Experiment 16

8978 Audio Loopback Experiment, Audio Bus Protocol, I2S (Inter-IC Sound), onboard audio chip WM8978, Schematics of the audio part of the development board, wm8978 board, WM8978 internal structure block diagram

Experiment 16 8978 Audio Loopback Experiment 16.1 Experiment Objective Learn about I2S (Inter-IC Sound) bus and how it works Familiar with the working mode of WM8978. And by configuring the interface mode and selecting the relevant registers in combination with the development board, complete the data transmission and reception, and verify it 16.2 Experiment Implement Perform audio loopback test by configuring the onboard audio chip WM8978 to check if the hardware is working properly Adjust the volume output level with the push buttons. 16.3 Experiment 16.3.1 WM8978 Introduction WM8978 is…

Experimental Manuals FII-PRX100-S FII-PRX100D FPGA Board Based FPGA Tutor PRX100 Risc-V

How ethernet work and familiar with MII, GMII, RGMII interface types – FII-PRX100 Risc-V Board Experiment 15

Configure PC end IP address, Ethernet, GMII interface, How ethernet work, MII interface, PC end IP information, RGMII interface, Schematics of RTL8211E-VB

Experiment 15 Ethernet 15.1 Experiment Objective Understand what Ethernet is and how it works Familiar with the relationship between different interface types (MII, GMII, RGMII) and their advantages and disadvantages (FII-PRA040 uses RGMII) Combine the development board to complete the transmission and reception of data and verify it 15.2 Experiment Implement Perform a loopback test to check if the hardware is working properly. Perform data receiving verification Perform data transmission verification 15.3 Experiment 15.3.1 Introduction to Experiment Principle Ethernet is a baseband LAN technology. Ethernet communication is a communication method…

Experimental Manuals FII-PRA040 FPGA Board Based FPGA Tutor Risc-V

High-speed ADC9226 Acquisition Experiment (FII-BD9226) – parallel ADC collectors and master the use of ADC9226 – FII-PRA040 Altera Risc-V Experiment 18

AD9226 chip, ADC9226 Module, ADI Company, FII-BD9226, FPGA development board, High-speed ADC9226 Acquisition Experiment, parallel ADC collectors

Experiment 18 High-speed ADC9226 Acquisition Experiment 18.1 Experiment Objective Learn about parallel ADC collectors and master the use of ADC9226. 18.2 Experiment Implement Insert the ADC9226 module face up into the FPGA development board to the GPIO2 and GPIO1 ports which are next to the red-green audio module. Write programs to use this module to test 18.3 Experiment 18.3.1 ADC9226 Module Introduction ADC9226 module adopts AD9226 chip design of ADI Company. This chip is a monolithic, 12-bit, 65 MSPS analog-to-digital converter (ADC). It uses a single power supply and…

Experimental Manuals FII-PRA040 FPGA Board Based FPGA Tutor Risc-V

OV5640 Camera Photo Display Experiment, IIC bus, HDMI, Understand the power-on sequence of the OV5640 – FII-PRA040 Altera Risc-V Experiment 17

5640 power-on sequence, HDMI, IIC bus, OV5640 Camera, OV5640 Camera Photo Display Experiment, OV5640 datasheet, register configuration process

Experiment 17 Photo Display Experiment of OV5640 Camera 17.1 Experiment Objective Understand the power-on sequence of the OV5640 camera and the corresponding register configuration process when outputting images of different resolutions Review previous knowledge of IIC bus Review previous knowledge of HDMI 17.2 Experiment Implement Read the power-on sequence of the OV5640 datasheet, and correctly write the power-on control program according to the peripheral module schematics. Correctly write the configuration program of the OV5640 camera with a resolution of 640X480 according to the timing requirements of the SCCB interface Based…