FPGA Products

1.Introduction to FII-RISCV CPU Direct to Table of Contents: RISC-V Syllabus First of all, there is an overview of the CPU, FII-RISCV. RISCV is an open standard instruction set architecture (ISA) based on reduced instruction set computer (RISC) principles [1]. FII-RISCV is researched and developed following the RISCV standard. Here are some basic features about FII-RISCV: RV32I (32 registers that supports integer operations) Does not support multiplication instructions (the newest version do support) Does not support Atomic operations Does not support compressed instruction Supports software interrupt Supports…

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FII-PE7030 FPGA Tutor PetaLinux SOC Tutor

Ubuntu Network Connections Guide in FPGA Board Development Environment

March 22, 2021April 9, 2021 beginner FPGACreating a TFTP Server in Ubuntu, Ubuntu, Using NFS and SSH in Ubuntu, vsftpd, Windows

Ubuntu Network Connections Guide Table of Contents Section 1: Exchanging Files Between Ubuntu and Windows 3 Setting up FTP in Ubuntu 3 Setting up the FTP Client in Windows 4 Setting up FileZilla and Transferring Files 5 Section 2: Creating a tftp Server in Ubuntu 9 Using NFS and SSH in Ubuntu 10 Turing on NFS 10 Turning on SSH 11 Installing and Using PuTTY 12 Installing PuTTY 12 Using PuTTY 14 Section 1: Exchanging Files Between Ubuntu and Windows *In order to follow along to this tutorial, you…

FII-BD7100 FII-PE7030 PetaLinux SOC Tutor

Step by Step Installation of PetaLinux on Ubuntu via VirtualBox in FPGA Development Board

March 15, 2021March 22, 2021 beginner FPGAFPGA development board, petalinux, PetaLinux files, Ubuntu, Ubuntu for PetaLinux, VirtualBox

Table of Contents Copyright Notice 2 Section 0: Prerequisites 3 Section 1: Creating your first Virtual Machine using VirtualBox 3 1.1 Installing VirtualBox 3 1.2 Creating a Virtual Machine Part 1 – Setting up the VirtualBox environment 7 1.3 Creating a Virtual Machine Part 2 – Downloading and installing Ubuntu 12 Section 2: Setting up Ubuntu for PetaLinux 22 2.1 Creating a Snapshot 22 2.2 Getting familiar with Ubuntu – Shutting down & Restart 25 2.3 Getting familiar with Ubuntu – Changing the properties 26 Section 3: Installing and Working…

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FII-BD7100 FII-PE7030 PetaLinux SOC Tutor

How to Use RCP, SCP, and TFTP 6 With FII-PE7030, FII-BD7100 Development Board

March 15, 2021March 22, 2021 beginner FPGAFII-BD7100, FII-PE7030, RCP, SCP, TFTP, TFTP 6

Table of Contents Copyright Notice 2 Section 1: Using RCP and SCP to Transfer Files 3 Section 2: Using TFTP 6 Copyright Notice: © 2020 Fraser Innovation Inc ALL RIGHTS RESERVED Without written permission of Fraser Innovation Inc, no unit or individual may extract or modify part of or all the contents of this manual. Offenders will be held liable for their legal responsibility. Thank you for purchasing the FPGA development board. Please read the manual carefully before using the product and make sure that you know how to use…

FII-BD7100 FII-PE7030 PetaLinux SOC Tutor

Linux Network File Transfer Using RCP, SCP, and Using WinSCP to Transfer Files Between Windows and Linux 5

March 15, 2021March 22, 2021 beginner FPGAFile Transfer, Linux, Linux 5, RCP, SCP, SCP Command in Linux, Windows, WinSCP

Table of Contents Copyright Notice 2 Section 1: Using the RCP Command in Linux 3 Section 2: Using the SCP Command in Linux 4 Section 3: Using WinSCP to Transfer Files Between Windows and Linux 5 Copyright Notice: © 2020 Fraser Innovation Inc ALL RIGHTS RESERVED Without written permission of Fraser Innovation Inc, no unit or individual may extract or modify part of or all the contents of this manual. Offenders will be held liable for their legal responsibility. Thank you for purchasing the FPGA development board. Please read the…

FII-BD7100 FII-PE7030 SOC Tutor

Basic Introduction to Device Tree Driver Development

March 15, 2021May 6, 2021 beginner FPGADevice Tree Driver, FII-BD7100, FII-PE7030, FPGA development board, petalinux

Basic Introduction to Device Tree Driver Development Copyright Notice: © 2020 Fraser Innovation Inc ALL RIGHTS RESERVED Without written permission of Fraser Innovation Inc, no unit or individual may extract or modify part of or all the contents of this manual. Offenders will be held liable for their legal responsibility. Thank you for purchasing the FPGA development board. Please read the manual carefully before using the product and make sure that you know how to use the product correctly. Improper operation may damage the development board. This manual is constantly…

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FII-BD7100 FII-PE7030 JTAG SOC Tutor

Altera JTAG Setup & Troubleshooting

March 15, 2021March 22, 2021 beginner FPGAAltera, Jtag, Quartus Prime

Table of Contents Copyright Notice 2 Common Problems: 3 Installing Quartus Prime 4 Common associated issues: 4 Installing Components for Quartus Prime 5 Common associated issues: 5 Setting up the Drivers 6 Common associated issues: 6 Manually Install Device Drivers 7 Common associated issues: 8 Choosing the Correct Hardware 9 Common associated issues: 9 Setting the JTAG Interface 10 Common associated issues: 10 Copyright Notice: © 2020 Fraser Innovation Inc ALL RIGHTS RESERVED Without written permission of Fraser Innovation Inc, no unit or individual may extract or modify part of…

FII-PE7030

FII-PE7030 FPGA Development Board and Educational Platform Experimental Manual and Haredware Reference Guide

March 15, 2021March 15, 2021 beginner FPGAExperimental Manual, FII-PE7030, FPGA development board, Haredware Reference Guide

FII-PE7030 Hardware Reference Guide EVB Board – FII-PE7030 User Experimental Manuals Introduction to Zynq_7030 Development System FII-PE7030 zynq_7030 Main Resources Usage and FPGA Development Experiemnt zynq xc7z030 board – FII-PE7030 Experiment 1 LED Shifting Design zynq xc7z030 board – FII-PE7030 Experiment 2 – Analysis of Switch Signals via ILA zynq xc7z030 board – FII-PE7030 Experiment 3 – Segment Display Digital Clock Experiment zynq xc7z030 board – FII-PE7030 Experiment 4 – Button Debounce zynq xc7z030 board – FII-PE7030 Experiment 5 – Digital Clock Comprehensive Experiment zynq xc7z030 board – FII-PE7030 Experiment…

FII-BD9371 FPGA Board Based RF Transceivers

AD9371

December 10, 2020April 9, 2021 beginner FPGAad9361, ad9361 development board, ad9371, AD9371 Evaluation Boards, AD9371 RF transceiver, algorithms, Filter and Signal Path Configuration, RX Signal Path

ADRV9371-W/PCBZ Compatible RF/IF and RFID FPGA Board -$999 – AD9371 Development Board- FII-BD9371 Board AD9371 Evaluation Boards AD9371 Overview The AD9371 RF transceiver is designed for applications that require high performance radio transmissions across a wideband frequency range, such as 3G/4G Macro BTS, 3G/4G Massive MIMO, and SDR. The AD9371 is packaged in a highly integrated 12mm x 12mm SoC which replaces as many as 20 high performance discrete components. Introducing the AD9371 The AD9371 RF transceiver is for applications that require high performance radios across a wideband frequency range…

FII RISC-V3.01 CPU FII-PRA040 FII-PRX100-S FII-PRX100D Risc-V Risc-V Core Risc-V Tutorial

RISC-V Instruction Set Explanation

December 1, 2020May 17, 2021 beginner FPGAAddress alignment, B-type, General-Purpose Register, Handle overflow situations, I-type, Instruction Set, J-type, Load & Store, R-type, Risc-V, RISC-V base instruction formats, RISC-V base instruction formats 6, U-type

V1.0 Fraser Innovation inc RISCV instruction set explanation Version Control Version Date Description V1.0 2020/11/27 Initial Release Copyright Notice: © 2020 Fraser Innovation Inc ALL RIGHTS RESERVED Without written permission of Fraser Innovation Inc, no unit or individual may extract or modify part of or all the contents of this manual. Offenders will be held liable for their legal responsibility. Thank you for purchasing the FPGA development board. Please read the manual carefully before using the product and make sure that you know how to use the product correctly. Improper…