FPGA Products - Part 7

zynq xc7z030 board – FII-PE7030 Experiment 8 – Use of ROM, Study the format of .coe and how to edit .coe file to configure the contents of ROM

January 7, 2020August 24, 2020 SteveGuysbitstream, Experiment, FII-PE7030, Use of ROM, zynq xc7z030 board

Experiment 8 Use of ROM 8.1 Experiment Objective Study the usage of internal memory block of FPGA Study the format of *.coe and how to edit *.coe file to configure the contents of ROM Learn to use RAM, read and write RAM 8.2 Experiment Implement Design 16 outputs ROM, address ranging 0-255 Interface 8-bit switch input as ROM’s address Segment display illustartes the contents of ROM and require conversion of hexadecimal to BCD output. 8.3 Experiment 8.3.1 Program Design The first step: the establishment of the main program…

Experimental phenomenon of hexadecimal number to BCD code conversion

Experimental Manuals FII-PE7030 FPGA Products

Binary numbers to BCD (bin_to_bcd), Hexadecimal Number to BCD (hex_to_bcd) Code Conversion and Application – zynq xc7z030 board – FII-PE7030 Experiment 7

January 7, 2020June 28, 2020 SteveGuysBCD Code, bitstream file, FII-PE7030, Hexadecimal Number, zynq xc7z030 board

Experiment 7 Hexadecimal Number to BCD Code Conversion and Application Experiment Objective Learn to convert binary numbers to BCD (bin_to_bcd) Learn to convert hexadecimal numbers to BCD (hex_to_bcd) 7.2 Experiment Implement Combined with experiment 6, display the calculation results on the segment display. 7.3 Experiment 7.2.1 Introduction to Hexadecimal Number to BCD Code Conversion Since the hexadecimal display is not intuitive, decimal display is more widely used in real life. Human eye recognition is relatively slow, so the display from hexadecimal to decimal does not need to be too fast.…

Successfully compiled the simulation library

Experimental Manuals FII-PE7030 FPGA Board Based FPGA Products FPGA Tutor

zynq xc7z030 board – FII-PE7030 Experiment 6 – Use of Multipliers and ISIM

January 7, 2020January 7, 2020 SteveGuysFII-PE7030, ISIM, Modelsim, Multipliers, zynq xc7z030 board

Experiment 6 Use of Multipliers and ISIM 6.1 Experiment Objective Learn to use multiplier Use ISIM to simulate design output 6.2 Experiment Implement 8×8 multiplier, the first input value is an 8-bit switch, and the second input value is the output of an 8-bit counter. Observe the output in ISIM 6.3 Experiment 6.3.1 Program Design The first step: the establishment of the main program framework module mult_sim( input inclk_p, input inclk_n, input [7:0] sw, output [15:0] mult_res, output reg [7:0] count ); endmodule The second step: call multiplier IP core…

zynq xc7z030 board – FII-PE7030 Experiment 4 -Digital clocl comprehensive design result

FII-PE7030 FPGA Board Based FPGA Products

zynq xc7z030 board – FII-PE7030 Experiment 5 – Digital Clock Comprehensive Experiment

January 7, 2020 SteveGuysButton Debounce, Digital Clock Comprehensive Experiment, FII-PE7030, zynq xc7z030 board

Experiment 5 Digital Clock Comprehensive Experiment 5.1 Experiment Objective Review the segment display content of experiment 3, and the button debounce content of experiment 4; Combine experiment 3 and experiment 4 to design a complete adjustable digital clock; 5.2 Experiment Implement Set four push buttons (left, right, up, down); Left and right push buttons control the calibration function, switch between segment display of hour, minute and second; Up and down calibration by adding 1 and subtracting 1 to the data to be calibrated; Modular design so that the design can…

Experimental Manuals FII-PE7030 FPGA Products

Learn button debounce principle and adaptive programming, Zynq_7030 button hardware circuit – zynq xc7z030 board – FII-PE7030 Experiment 4 – Button Debounce

January 4, 2020August 10, 2020 SteveGuysButton Debounce, button debounce principle, FII-PE7030, zynq xc7z030 board, Zynq_7030 button hardware circuit

Experiment 4 Button Debounce 4.1 Experiment Objective Review the design process of the shifting LED Learn button debounce principle and adaptive programming Learn the connection and use of the Zynq_7030 button hardware circuit Comprehensive application button debounce and other conforming programming 4.2 Experiment Implement Control the movement of the lit LED by pressing the button Each time the button is pressed, the lit LED moves one bit. When the left shift button is pressed, the LED moves to the left, presses the right button, and the LED moves to the…

Experimental Manuals FII-PE7030 FPGA Products

BCD decoder, Display design of hexadecimal to 7 segment display decoders, Achieve digital clock display – zynq xc7z030 board – FII-PE7030 Experiment 3 – Segment Display Digital Clock Experiment

January 4, 2020July 8, 2020 SteveGuysAchieve digital clock display, BCD decoder, bitstream files, Display design of hexadecimal to 7 segment display decoders, FII-PE7030, pin assignment of FPGA, the design of frequency divider, Verilog tree hierarchy, zynq xc7z030 board, Zynq_7030 development board

3.1 Experiment Objective Review the contents of experiment 1 and experiment 2, master the configuration of PLL, the design of frequency divider, the principle of schematics and the pin assignment of FPGA. Familiar with the design of Verilog’s tree hierarchy Study BCD decoder Display design of hexadecimal to 7 segment display decoders Achieve digital clock display 3.2 Experiment Implement The display decoder has two lower digits to display seconds, the middle two digits to display minutes, and the highest two digits to display hours. Separate the seconds, minutes, and hours…

Debugging results - Analysis of Switch Signals via ILA

Experimental Manuals FII-PE7030 FPGA Products

Learn to use ILA (Integrated Logic Analyzer) in Vivado, Practice the call of system resource PLL, zynq xc7z030 board – FII-PE7030 Experiment 2

January 4, 2020July 8, 2020 SteveGuysIntegrated Logic Analyzer, Switch Signals, xc7z030 board, zynq xc7z030 board

Experiment 2 Analysis of Switch Signals via ILA 2.1 Experiment Objective Continue to practice using develop board Continue to practice the call of system resource PLL Learn to use ILA (Integrated Logic Analyzer) in Vivado 2.2 Experiment Implement Capture and analyze switch signals on the development board by using ILA 2.3 Experiment 2.3.1 Introduction of Switches The on-board switch is 8 DIP switches, as shown in Figure 2.1. The switch is used to switch the circuit by turning the switch handle. Figure 2.1 Switch physical picture 2.3.2 Hardware Design The…

Experimental Manuals FII-PE7030 FPGA Products Risc-V

zynq xc7z030 board – use Vivado to establish a new project, call the system resource PLL to establish the clock， Write Verilog HDL program to achieve frequency division and implement LED shifting，FII-PE7030 Experiment 1 LED Shifting Design

January 4, 2020July 3, 2020 SteveGuysLED shifting, zynq xc7z030 board

Experiment 1 LED Shifting Design 1.1 Experiment Objective Practice how to use the development system software Vivado to establish a new project, call the system resource PLL to establish the clock. Write Verilog HDL program to achieve frequency division and implement LED shifting Combine hardware resources for FPGA pin configuration Compile, download the program to the develop board, and verify Observe the experimental result and debug the project 1.2 Experiment Implement All LEDs light up during reset; After reset, LED lights from low to high (from right to left) in…

FII-PE7030 FPGA Products

zynq_7030 Main Resources Usage and FPGA Development Experiemnt

January 4, 2020March 2, 2021 SteveGuysbutton debouncing experiment, Digital Clock Comprehensive Experiment, FII-PE7030-Physical-Picture, hex to BCD conversion and application, ILA experiment, LED shifting design, Segment display digital clock experiment, use of multiplier and ISIM simulation

This part mainly guides the user to learn the development of FPGA program and the use of onboard hardware through the development example of FPGA. At the same time, the application system software Xilinx is introduced from the elementary to the profound. The development exercises covered in this section are as follows: Experiment 1: LED shifting design Experiment 2: ILA experiment Experiment 3: Segment display digital clock experiment Experiment 4: button debouncing experiment Experiment 5: digital clock comprehensive experiment Experiment 6: use of multiplier and ISIM simulation Experiment 7: hex…

FII-PE7030 FPGA Products

Zynq_7030 Development System FII-PE7030

January 4, 2020June 20, 2020 SteveGuysHDMI interface, RISCV_JTAG download port, ZYNQ_7030 chip

System Design Objective The main purpose of this system design is to complete FPGA learning, development and experiment with Xilin-Vivado. The main device uses the XC7Z030-1FFG676C. The main learning and development projects can be completed as follows: （1）Basic FPGA design training （2）Construction and training of the SOPC (Microblaze) system （3）IC design and verification, the system provides hardware design, simulation and verification of RISC-V CPU. （4）Based on RISC-V development and application. （5）The system is specifically optimized for hardware design for RISC-V system applications. 2、System Resource Extended memory: two DDR3 (PL end)…