Author: SteveGuys

Experimental Manuals FPGA Tutor PRX100 Risc-V

Verilog HDL program to achieve frequency division, Write Verilog HDL program to implement LED shifting – Risc-V FPGA Board Xilinx – Development Board Experiment 1 – LED Shifting – FII-PRX100

SteveGuys

Experiment 1 LED Shifting 1. Experiment Object Practice how to use the development system software Vivado to establish a new project, call the system resource PLL to establish the clock. Write Verilog HDL program to achieve frequency division Write Verilog HDL program to implement LED shifting Combine hardware resources for FPGA pin configuration Compile Download the program to the develop board Observe the experimental result and debug the project 2. Create A New Project Under Vivado Start Vivado in the start Menu. See Fig 1. 1 Fig 1. 1 Start…

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prx100 system block diagram
Experimental Manuals FPGA Tutor PRX100 Risc-V

xilinx Risc-V FPGA Board – FII-PRX100 – FPGA Development Board System Introduction

SteveGuys

  FII-PRX100 Development Board ( ARTIX 100T, XC7A100T, RISC-V FPGA Developing Board) Online Shopping: https://fpgamarketing.com/FII-PRX100-ARTIX-100T-XC7A100T-RISC-V-FPGA-Board-PRX100-1.htm Fraser Innovation Inc develops FII-PRX100 based on the boards of the Xilinx ARTIX-7 series. It was initial released in 2018. This development board is resource-rich and high-speed, making it an ideal platform for learning and engineering research. This development board has been spent a lot on system design, PCB design, and function creation. It could even be said comprehensive and powerful. System Design Objective The main purpose of this system design is to complete FPGA learning,…

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FPGA for Beginners Hardware Reference Guide

FPGA Board for beginner – FII-PRA006/010 Hardware Reference Guide

SteveGuys

V1.2 FII-PRA006/010 Hardware Reference Guide Version Control Version Date Description V1.0 06/25/2019 Initial Release V1.1 07/15/2019 Add Description About PCF8591 V1.2 07/19/2019 Add Description About Oscillator and IIC Copyright Notice: © 2019 Fraser Innovation Inc ALL RIGHTS RESERVED Without written permission of Fraser Innovation Inc, no unit or individual may extract or modify part of or all the contents of this manual. Offenders will be held liable for their legal responsibility. Thank you for purchasing the FPGA development board. Please read the manual carefully before using the product and make…

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FPGA for Beginners FPGA Tutor PRA006/PRA010

interface types (MII, GMII, RGMII) advantages and disadvantages – Ethernet Experiment – FPGA Board for Beginner – Experiment 14

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Experiment 14 Ethernet Experiment 14.1 Experiment Objective Understand what Ethernet is and how it works Familiar with the relationship between different interface types (MII, GMII, RGMII) and their advantages and disadvantages (our development board uses RGMII) Combine the development board to complete the transmission and reception of data and verify 14.2 Experiment Requirement Perform a loopback test to check if the hardware is working properly. Performing data verification Perform data transmission verification 14.3 Experiment 14.3.1 Experiment Principle Ethernet is a baseband LAN technology. Ethernet communication is a communication method that…

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FPGA for Beginners FPGA Tutor

FPGA Beginner Tutorial – VGA Experiment – FPGA Board for Beginner – Experiment 13

SteveGuys

Experiment 13 VGA Experiment 13.1 Experiment Objective Master the principle of VGA implementation Design a simple VGA image display (The design here is a vertical color bar) 13.2 VGA Principle VGA (Video Graphics Array) is a computer display standard that IBM introduced in 1987 using analog signals. VGA is a low standard that is supported by most manufacturers. PCs must support the VGA standard before loading their own unique drivers. The schematic diagram of the VGA PCB is shown in Figure 13. 1 Fig 13. 1 PCB schematics The VGA…

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FPGA for Beginners FPGA Tutor

FPGA Beginner Tutorial – AD, DA Experiment – FPGA Board for Beginner – Experiment 12

SteveGuys

Experiment 12 AD, DA Experiment 12.1 Experiment Objective Since in the real world, all naturally occurring signals are analog signals, and all that are read and processed in actual engineering are digital signals. There is a process of mutual conversion between natural and industrial signals (digital-to-analog conversion: DAC, analog-to-digital conversion: ADC). The purpose of this experiment is twofold: Learning the theory of AD conversion Read the value of AD acquisition from PCF8591, and convert the value obtained into actual value, display it with segment decoders   12.2 Experiment Requirement Perform…

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FPGA for Beginners FPGA Tutor

FPGA Beginner Tutorial – IIC Protocol Transmission – FPGA Board for Beginner – Experiment 11

SteveGuys

Experiment 11 IIC Protocol Transmission 11.1 Experiment Objective There is an IIC interface EEPROM chip 24LC02 in the test plate, capacity sized 2 kbit (256 bite). Since the data is not lost after the EEPROM is powered down, users can store some hardware setup data or user information. Learning the basic principles of the different IIC bus, mastering the IIC communication protocol Master the method of reading and writing EEPROM Joint debugging using logic analyzer 11.2 Experiment Requirement Correctly write a number to any address in the EEPROM (this experiment…

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FPGA for Beginners FPGA Tutor Pocket Boards

FPGA Tutorial – Asynchronous Serial Port Design and Experiment – FPGA for Beginner – Experiment 10

SteveGuys

Experiment 10 Asynchronous Serial Port Design and Experiment 10.1 Experiment Objective Because asynchronous serial ports are very common in industrial control, communication, and software debugging, they are also vital in FPGA development. Learning the basic principles of asynchronous serial port communication, handshake mechanism, data frame Master asynchronous sampling techniques Review the frame structure of the data packet Learning FIFO Joint debugging with common debugging software of PC (SSCOM, teraterm, etc.) 10.2 Experiment Requirement Design and transmit full-duplex asynchronous communication interface Tx, Rx Baud rate of 11520 bps, 8-bit data, 1…

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SignalTap II simulation
FPGA Board Based FPGA for Beginners FPGA Tutor Pocket Boards PRA006/PRA010

Use Dual-port RAM to Read and Write Frame Data, use synchronous (or asynchronous ) clock to control the synchronization of frame structure – FPGA Board Beginner Tutorial – Experiment 9

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Experiment 9 Use Dual_port RAM to Read and Write Frame Data 9.1 Experiment Objective Learn to configure and use dual-port RAM Learn to use synchronous clock to control the synchronization of frame structure Learn to use asynchronous clock to control the synchronization of frame structure Experiment Implement Observing the synchronization structure of synchronous clock frames using SignalTap II Extended the use of dual-port RAM Design the use of three-stage state machine Design a 16-bit data frame Data is generated by an 8-bit counter: Data={~counta,counta} The ID of the data frame…

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Learn How to use ROM
FPGA Board Based FPGA for Beginners FPGA Tutor Pocket Boards PRA006/PRA010

Design 16 outputs ROM, Study the format of *.mif and how to edit *.mif file to configure the contents of ROM, Use of ROM (Read-only Memory) – FPGA Board for Beginner Tutorial – Experiment 8

SteveGuys, , , , , ,

Experiment 8 Use of ROM 8.1 Experiment Objective Study the internal memory block of FPGA Study the format of *.mif and how to edit *.mif file to configure the contents of ROM Learn to use RAM, read and write RAM 8.2 Experiment Implement Design 16 outputs ROM, address ranging 0-255 Interface 8-bit switch input as ROM’s address Segment display illustrates the contents of ROM and require conversion of hexadecimal to BCD output. 8.3 Experiment 8.3.1 Introduction to Program This experiment was carried out on the basis of Experiment 7, and…

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