Tag: zynq xc7z030 board

Ethernet Experiment Information received by PC from FPGA
FII-PE7030 FPGA Board Based FPGA Products FPGA Tutor

Ethernet work mechanism, the relationship between different interface types (MII, GMII, RGMII), leanrn how to transmission and reception of data, zynq xc7z030 board – FII-PE7030 Experiment 13

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Experiment 13 Ethernet 13.1 Experiment Objective Understand what Ethernet and how it works Familiar with the relationship between different interface types (MII, GMII, RGMII) and their advantages and disadvantages (here uses RGMII) Combine the development board to complete the transmission and reception of data and verify it 13.2 Experiment Implement Perform a loopback test to check if the hardware is working properly. Perform data receiving verification Perform data transmission verification 13.3 Experiment 13.3.1 Introduction to Experiment Principle Ethernet is a baseband LAN technology. Ethernet communication is a communication method that…

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zynq xc7z030 board – FII-PE7030 Experiment 12 - HDMI display (color strip)
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IIC protocol knowledge，Learn HDMI theory – zynq xc7z030 board – FII-PE7030 Experiment 12 – HDMI Experiment

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Experiment 12 HDMI Experiment 12.1 Experiment Objective Review IIC protocol knowledge Learn HDMI theory 12.2 Experiment Implement Through the HDMI interface, different image contents are displayed on the screen. 12.3 Experiment 12.3.1 Introduction to HDMI Interface and ADV7511 Chip Image display processing has always been the focus of FPGA research. At present, the image display mode is also developing. The image display interface is also gradually transitioning from the old VGA interface to the new DVI or HDMI interface. HDMI (High Definition Multimedia Interface) is a digital video/audio interface technology.…

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IIC transmission experimental phenomenon
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asynchronous IIC bus, and the IIC communication protocol， reading and writing EEPROM – zynq xc7z030 board – FII-PE7030 Experiment 11 – IIC Protocol Transmission

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Experiment 11 IIC Protocol Transmission 11.1 Experiment Objective Learning the basic principles of asynchronous IIC bus, and the IIC communication protocol Master the method of reading and writing EEPROM Joint debugging using logic analyzer 11.2 Experiment Implement Correctly write a number to any address in the EEPROM (this experiment writes to the register of 8’h03 address) through the FPGA (here changes the written 8-bit data value by (SW7~SW0)). After writing in successfully, read the data as well. The read data is displayed directly on the segment display. Download the program…

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zynq xc7z030 board – FII-PE7030 Experiment 10 -Sent data received on the host computer
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zynq xc7z030 board – FII-PE7030 Experiment 10 – Asynchronous Serial Port Design and Experiment

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10.1 Experiment Objective Because asynchronous serial ports are very common in industrial control, communication, and software debugging, they are also vital in FPGA development. Study the basic principles of asynchronous serial port communication, handshake mechanism, data frame Master asynchronous sampling techniques Review the frame structure of the data packet Learning FIFO Joint debugging with common debugging software of PC (SSCOM, teraterm, etc.) 10.2 Experiment Implement Design and transmit full-duplex asynchronous communication interface Tx, Rx Baud rate of 11520 bps, 8-bit data, 1 start bit, 1 or 2 stop bits Receive…

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Use Dual-port RAM to Read and Write Frame Data
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zynq xc7z030 board – FII-PE7030 Experiment 9 – Use Dual-port RAM to Read and Write Frame Data

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Experiment 9 Use Dual-port RAM to Read and Write Frame Data 9.1 Experiment Objective Learn to configure and use dual-port RAM Learn to use synchronous clock to control the synchronization of frame structure Learn to use asynchronous clock to control the synchronization of frame structure Use ILA to observe the structure of a synchronized clock frame Extended the use of dual-port RAM Design the use of three-stage state machine Experiment Implement Use ILA to observe the structure of a synchronized clock frame Extended the use of dual-port RAM Design the…

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Experimental phenomenon of ROM usage
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zynq xc7z030 board – FII-PE7030 Experiment 8 – Use of ROM, Study the format of *.coe and how to edit *.coe file to configure the contents of ROM

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    Experiment 8 Use of ROM 8.1 Experiment Objective Study the usage of internal memory block of FPGA Study the format of *.coe and how to edit *.coe file to configure the contents of ROM Learn to use RAM, read and write RAM 8.2 Experiment Implement Design 16 outputs ROM, address ranging 0-255 Interface 8-bit switch input as ROM’s address Segment display illustartes the contents of ROM and require conversion of hexadecimal to BCD output. 8.3 Experiment 8.3.1 Program Design The first step: the establishment of the main program…

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Experimental phenomenon of hexadecimal number to BCD code conversion
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Binary numbers to BCD (bin_to_bcd), Hexadecimal Number to BCD (hex_to_bcd) Code Conversion and Application – zynq xc7z030 board – FII-PE7030 Experiment 7

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Experiment 7 Hexadecimal Number to BCD Code Conversion and Application Experiment Objective Learn to convert binary numbers to BCD (bin_to_bcd) Learn to convert hexadecimal numbers to BCD (hex_to_bcd) 7.2 Experiment Implement Combined with experiment 6, display the calculation results on the segment display. 7.3 Experiment 7.2.1 Introduction to Hexadecimal Number to BCD Code Conversion Since the hexadecimal display is not intuitive, decimal display is more widely used in real life. Human eye recognition is relatively slow, so the display from hexadecimal to decimal does not need to be too fast.…

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Successfully compiled the simulation library
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zynq xc7z030 board – FII-PE7030 Experiment 6 – Use of Multipliers and ISIM

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Experiment 6 Use of Multipliers and ISIM 6.1 Experiment Objective Learn to use multiplier Use ISIM to simulate design output 6.2 Experiment Implement 8×8 multiplier, the first input value is an 8-bit switch, and the second input value is the output of an 8-bit counter. Observe the output in ISIM 6.3 Experiment 6.3.1 Program Design The first step: the establishment of the main program framework module mult_sim( input inclk_p, input inclk_n, input [7:0] sw, output [15:0] mult_res, output reg [7:0] count ); endmodule The second step: call multiplier IP core…

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zynq xc7z030 board – FII-PE7030 Experiment 4 -Digital clocl comprehensive design result
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zynq xc7z030 board – FII-PE7030 Experiment 5 – Digital Clock Comprehensive Experiment

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Experiment 5 Digital Clock Comprehensive Experiment 5.1 Experiment Objective Review the segment display content of experiment 3, and the button debounce content of experiment 4; Combine experiment 3 and experiment 4 to design a complete adjustable digital clock; 5.2 Experiment Implement Set four push buttons (left, right, up, down); Left and right push buttons control the calibration function, switch between segment display of hour, minute and second; Up and down calibration by adding 1 and subtracting 1 to the data to be calibrated; Modular design so that the design can…

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Button Debounce - Experiment results
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Learn button debounce principle and adaptive programming, Zynq_7030 button hardware circuit – zynq xc7z030 board – FII-PE7030 Experiment 4 – Button Debounce

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Experiment 4 Button Debounce 4.1 Experiment Objective Review the design process of the shifting LED Learn button debounce principle and adaptive programming Learn the connection and use of the Zynq_7030 button hardware circuit Comprehensive application button debounce and other conforming programming 4.2 Experiment Implement Control the movement of the lit LED by pressing the button Each time the button is pressed, the lit LED moves one bit. When the left shift button is pressed, the LED moves to the left, presses the right button, and the LED moves to the…

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