FII-PE7030 - Part 2

IIC transmission experimental phenomenon

asynchronous IIC bus, and the IIC communication protocol， reading and writing EEPROM – zynq xc7z030 board – FII-PE7030 Experiment 11 – IIC Protocol Transmission

Experiment, FII-PE7030, IIC Protocol Transmission, zynq xc7z030 board

Experiment 11 IIC Protocol Transmission 11.1 Experiment Objective Learning the basic principles of asynchronous IIC bus, and the IIC communication protocol Master the method of reading and writing EEPROM Joint debugging using logic analyzer 11.2 Experiment Implement Correctly write a number to any address in the EEPROM (this experiment writes to the register of 8’h03 address) through the FPGA (here changes the written 8-bit data value by (SW7~SW0)). After writing in successfully, read the data as well. The read data is displayed directly on the segment display. Download the program…

zynq xc7z030 board – FII-PE7030 Experiment 10 -Sent data received on the host computer

Experimental Manuals FII-PE7030 FPGA Board Based FPGA Products FPGA Tutor

zynq xc7z030 board – FII-PE7030 Experiment 10 – Asynchronous Serial Port Design and Experiment

Asynchronous Serial Port Design and Experiment, FII-PE7030, FPGA development, zynq xc7z030 board

10.1 Experiment Objective Because asynchronous serial ports are very common in industrial control, communication, and software debugging, they are also vital in FPGA development. Study the basic principles of asynchronous serial port communication, handshake mechanism, data frame Master asynchronous sampling techniques Review the frame structure of the data packet Learning FIFO Joint debugging with common debugging software of PC (SSCOM, teraterm, etc.) 10.2 Experiment Implement Design and transmit full-duplex asynchronous communication interface Tx, Rx Baud rate of 11520 bps, 8-bit data, 1 start bit, 1 or 2 stop bits Receive…

Experimental Manuals FII-PE7030 FPGA Board Based FPGA Products FPGA Tutor

zynq xc7z030 board – FII-PE7030 Experiment 9 – Use Dual-port RAM to Read and Write Frame Data

Dual-port RAM, Experiment, FII-PE7030, Frame Data, Use Dual-port RAM to Read and Write Frame Data, zynq xc7z030 board

Experiment 9 Use Dual-port RAM to Read and Write Frame Data 9.1 Experiment Objective Learn to configure and use dual-port RAM Learn to use synchronous clock to control the synchronization of frame structure Learn to use asynchronous clock to control the synchronization of frame structure Use ILA to observe the structure of a synchronized clock frame Extended the use of dual-port RAM Design the use of three-stage state machine Experiment Implement Use ILA to observe the structure of a synchronized clock frame Extended the use of dual-port RAM Design the…

Experimental Manuals FII-PE7030 FPGA Board Based FPGA Products FPGA Tutor

zynq xc7z030 board – FII-PE7030 Experiment 8 – Use of ROM, Study the format of .coe and how to edit .coe file to configure the contents of ROM

bitstream, Experiment, FII-PE7030, Use of ROM, zynq xc7z030 board

Experiment 8 Use of ROM 8.1 Experiment Objective Study the usage of internal memory block of FPGA Study the format of *.coe and how to edit *.coe file to configure the contents of ROM Learn to use RAM, read and write RAM 8.2 Experiment Implement Design 16 outputs ROM, address ranging 0-255 Interface 8-bit switch input as ROM’s address Segment display illustartes the contents of ROM and require conversion of hexadecimal to BCD output. 8.3 Experiment 8.3.1 Program Design The first step: the establishment of the main program…

Experimental phenomenon of hexadecimal number to BCD code conversion

Experimental Manuals FII-PE7030 FPGA Products

Binary numbers to BCD (bin_to_bcd), Hexadecimal Number to BCD (hex_to_bcd) Code Conversion and Application – zynq xc7z030 board – FII-PE7030 Experiment 7

BCD Code, bitstream file, FII-PE7030, Hexadecimal Number, zynq xc7z030 board

Experiment 7 Hexadecimal Number to BCD Code Conversion and Application Experiment Objective Learn to convert binary numbers to BCD (bin_to_bcd) Learn to convert hexadecimal numbers to BCD (hex_to_bcd) 7.2 Experiment Implement Combined with experiment 6, display the calculation results on the segment display. 7.3 Experiment 7.2.1 Introduction to Hexadecimal Number to BCD Code Conversion Since the hexadecimal display is not intuitive, decimal display is more widely used in real life. Human eye recognition is relatively slow, so the display from hexadecimal to decimal does not need to be too fast.…

Successfully compiled the simulation library

Experimental Manuals FII-PE7030 FPGA Board Based FPGA Products FPGA Tutor

zynq xc7z030 board – FII-PE7030 Experiment 6 – Use of Multipliers and ISIM

FII-PE7030, ISIM, Modelsim, Multipliers, zynq xc7z030 board

Experiment 6 Use of Multipliers and ISIM 6.1 Experiment Objective Learn to use multiplier Use ISIM to simulate design output 6.2 Experiment Implement 8×8 multiplier, the first input value is an 8-bit switch, and the second input value is the output of an 8-bit counter. Observe the output in ISIM 6.3 Experiment 6.3.1 Program Design The first step: the establishment of the main program framework module mult_sim( input inclk_p, input inclk_n, input [7:0] sw, output [15:0] mult_res, output reg [7:0] count ); endmodule The second step: call multiplier IP core…

zynq xc7z030 board – FII-PE7030 Experiment 4 -Digital clocl comprehensive design result

FII-PE7030 FPGA Board Based FPGA Products

zynq xc7z030 board – FII-PE7030 Experiment 5 – Digital Clock Comprehensive Experiment

Button Debounce, Digital Clock Comprehensive Experiment, FII-PE7030, zynq xc7z030 board

Experiment 5 Digital Clock Comprehensive Experiment 5.1 Experiment Objective Review the segment display content of experiment 3, and the button debounce content of experiment 4; Combine experiment 3 and experiment 4 to design a complete adjustable digital clock; 5.2 Experiment Implement Set four push buttons (left, right, up, down); Left and right push buttons control the calibration function, switch between segment display of hour, minute and second; Up and down calibration by adding 1 and subtracting 1 to the data to be calibrated; Modular design so that the design can…

Experimental Manuals FII-PE7030 FPGA Products

Learn button debounce principle and adaptive programming, Zynq_7030 button hardware circuit – zynq xc7z030 board – FII-PE7030 Experiment 4 – Button Debounce

Button Debounce, button debounce principle, FII-PE7030, zynq xc7z030 board, Zynq_7030 button hardware circuit

Experiment 4 Button Debounce 4.1 Experiment Objective Review the design process of the shifting LED Learn button debounce principle and adaptive programming Learn the connection and use of the Zynq_7030 button hardware circuit Comprehensive application button debounce and other conforming programming 4.2 Experiment Implement Control the movement of the lit LED by pressing the button Each time the button is pressed, the lit LED moves one bit. When the left shift button is pressed, the LED moves to the left, presses the right button, and the LED moves to the…

Experimental Manuals FII-PE7030 FPGA Products

BCD decoder, Display design of hexadecimal to 7 segment display decoders, Achieve digital clock display – zynq xc7z030 board – FII-PE7030 Experiment 3 – Segment Display Digital Clock Experiment

Achieve digital clock display, BCD decoder, bitstream files, Display design of hexadecimal to 7 segment display decoders, FII-PE7030, pin assignment of FPGA, the design of frequency divider, Verilog tree hierarchy, zynq xc7z030 board, Zynq_7030 development board

3.1 Experiment Objective Review the contents of experiment 1 and experiment 2, master the configuration of PLL, the design of frequency divider, the principle of schematics and the pin assignment of FPGA. Familiar with the design of Verilog’s tree hierarchy Study BCD decoder Display design of hexadecimal to 7 segment display decoders Achieve digital clock display 3.2 Experiment Implement The display decoder has two lower digits to display seconds, the middle two digits to display minutes, and the highest two digits to display hours. Separate the seconds, minutes, and hours…

Debugging results - Analysis of Switch Signals via ILA

Experimental Manuals FII-PE7030 FPGA Products

Learn to use ILA (Integrated Logic Analyzer) in Vivado, Practice the call of system resource PLL, zynq xc7z030 board – FII-PE7030 Experiment 2

Integrated Logic Analyzer, Switch Signals, xc7z030 board, zynq xc7z030 board

Experiment 2 Analysis of Switch Signals via ILA 2.1 Experiment Objective Continue to practice using develop board Continue to practice the call of system resource PLL Learn to use ILA (Integrated Logic Analyzer) in Vivado 2.2 Experiment Implement Capture and analyze switch signals on the development board by using ILA 2.3 Experiment 2.3.1 Introduction of Switches The on-board switch is 8 DIP switches, as shown in Figure 2.1. The switch is used to switch the circuit by turning the switch handle. Figure 2.1 Switch physical picture 2.3.2 Hardware Design The…