FPGA Products - Part 6

HDMI interface and ADV7511 chip physical photo

Learn HDMI principle, Introduction to HDMI and ADV7511 Chip, HDMI Display, FII-PRA040 Altera Risc-V tutorial Experiment 13

September 30, 2020September 30, 2020 SteveGuysADV7511 Chip, ADV7511 Hardware Users Guide, ADV7511 Programming Guide, HDMI, IIC bus, IIC protocol, Schematics of HDMI, Vertical synchronization

Experiment 13 HDMI Display 13.1 Experiment Objective Review IIC protocol Review EEPROM read and write Learn HDMI principle 13.2 Experiment Implement Display different image content on the screen through the HDMI. 13.3 Experiment 13.3.1 Introduction to HDMI and ADV7511 Chip Image display processing has always been the focus of FPGA research. At present, the image display mode is also developing. The image display interface is also gradually transitioning from the old VGA interface to the new DVI or HDMI interface. HDMI (High Definition Multimedia Interface) is a digital video/audio interface…

FII-PRA040

FII-PRA040 User Experimental Manuals ( 2020-09-28 Updated )

September 28, 2020September 30, 2020 SteveGuysAudio Bus Protocol, WM8978 Control Interface Timing

PRA040 USER EXPERIMENTAL MANUAL PRA040 EXPERIMENTAL INSTRUCTIONS FRASER INNOVATION INC December 07, 2019 Version Control Version Date Description 1.0 07/20/2019 Initial Release 1.1 07/29/2019 Add Experiment 15 1.2 07/31/2019 Revised some description about HDMI 1.3 08/16/2019 SRAM part revised 1.4 08/30/2019 Add a description in Ethernet 1.5 09/17/2019 Revise some syntax and code error 1.6 12/06/2019 Add Experiments 16-19 Contents Project Files Appendix 9 Part One: Introduction of FII-PRA040 Development System 10 1、Design Objective of the System 10 2、System Resource 10 3、Human-computer Interaction Interface 10 4、Software Development System 11…

Signal waveform of AD9226 captured by logic analyzer

FII-PRX100-S FII-PRX100D PRX100

FII-PRX100T User Experiment Manuals （newly updated 2020-09-28)

September 28, 2020September 28, 2020 SteveGuys

PRX100 USER experimental manual PRX100 EXPERIMENTAL INSTRUCTIONS FRASER INNOVATION INC December 11, 2019 Version Control Version Date Descrption V1.0 07/10/2019 Initial Release V1.1 09/16/2019 Modify part of pin assignments and Ethernet description V1.2 12/12/2019 Add Experiments 15-20 Contents: Part 1 FII-PRX100 Development System Introduction 6 1. System Design Objective 6 2. System Resource 6 3. Human-computer Interaction Interface 6 4. Software Development System 7 5. Supporting Resources 7 Part 2 FII-PRX100 Main Hardware Resources Usage and FPGA Development Experiment 7 Experiment 1 LED Shifting 7 1. Experiment Object 7…

https://fraserinnovations.com/wp-content/uploads/2018/09/ad9361-front.png

FII-BD9361 RF Transceivers

FII-BD9361 (AD-FMCOMMS3-EBZ Board Compatible) Hardware Configuration

June 5, 2020October 31, 2020 SteveGuysFII-AD9361, Hardware Configuration

V1.0 Fraser innovation inc FII-BD9361 Hardware Reference Guide Version Control Version Date Description V1.0 12/03/2019 Initial Release Copyright Notice: © 2019 Fraser Innovation Inc ALL RIGHTS RESERVED Without written permission of Fraser Innovation Inc, no unit or individual may extract or modify part of or all the contents of this manual. Offenders will be held liable for their legal responsibility. Thank you for purchasing the FPGA development board. Please read the manual carefully before using the product and make sure that you know how to use the product correctly. Improper…

Configuration FII-PE7030

xc7z030 board hardware resources and block diagram of ZYNQ chip

March 2, 2020June 2, 2020 SteveGuysBasic Features, FPGA, JTAG interfaces, PE7030, xc7z030 board

This development board uses Xilinx’s zynq7000 series chip, model XC7Z030-2FFG676I, 676-pin FPGA package. This chip can be divided into a PS (Processor System) part and a PL (Programmable Logic) part. On the PE7030 development board, the PS and PL sections of the XC7Z030 are both equipped with a wealth of external interfaces and devices for convenience use and functional verification. In addition, as always, the USB Cable downloader circuit is integrated on the development board. Users only need to use a USB cable to download and debug the development board.…

Ethernet Experiment Information received by PC from FPGA

FII-PE7030 FPGA Board Based FPGA Products FPGA Tutor

Ethernet work mechanism, the relationship between different interface types (MII, GMII, RGMII), leanrn how to transmission and reception of data, zynq xc7z030 board – FII-PE7030 Experiment 13

January 7, 2020February 1, 2021 SteveGuysEthernet Experiment, Experiment, FII-PE7030, zynq xc7z030 board

Experiment 13 Ethernet 13.1 Experiment Objective Understand what Ethernet and how it works Familiar with the relationship between different interface types (MII, GMII, RGMII) and their advantages and disadvantages (here uses RGMII) Combine the development board to complete the transmission and reception of data and verify it 13.2 Experiment Implement Perform a loopback test to check if the hardware is working properly. Perform data receiving verification Perform data transmission verification 13.3 Experiment 13.3.1 Introduction to Experiment Principle Ethernet is a baseband LAN technology. Ethernet communication is a communication method that…

zynq xc7z030 board – FII-PE7030 Experiment 12 - HDMI display (color strip)

Experimental Manuals FII-PE7030 FPGA Board Based FPGA Products FPGA Tutor

IIC protocol knowledge，Learn HDMI theory – zynq xc7z030 board – FII-PE7030 Experiment 12 – HDMI Experiment

January 7, 2020September 8, 2020 SteveGuysExperiment, FII-PE7030, HDMI display, HDMI Experiment, zynq xc7z030 board

Experiment 12 HDMI Experiment 12.1 Experiment Objective Review IIC protocol knowledge Learn HDMI theory 12.2 Experiment Implement Through the HDMI interface, different image contents are displayed on the screen. 12.3 Experiment 12.3.1 Introduction to HDMI Interface and ADV7511 Chip Image display processing has always been the focus of FPGA research. At present, the image display mode is also developing. The image display interface is also gradually transitioning from the old VGA interface to the new DVI or HDMI interface. HDMI (High Definition Multimedia Interface) is a digital video/audio interface technology.…

IIC transmission experimental phenomenon

Experimental Manuals FII-PE7030 FPGA Board Based FPGA Products FPGA Tutor

asynchronous IIC bus, and the IIC communication protocol， reading and writing EEPROM – zynq xc7z030 board – FII-PE7030 Experiment 11 – IIC Protocol Transmission

January 7, 2020September 8, 2020 SteveGuysExperiment, FII-PE7030, IIC Protocol Transmission, zynq xc7z030 board

Experiment 11 IIC Protocol Transmission 11.1 Experiment Objective Learning the basic principles of asynchronous IIC bus, and the IIC communication protocol Master the method of reading and writing EEPROM Joint debugging using logic analyzer 11.2 Experiment Implement Correctly write a number to any address in the EEPROM (this experiment writes to the register of 8’h03 address) through the FPGA (here changes the written 8-bit data value by (SW7~SW0)). After writing in successfully, read the data as well. The read data is displayed directly on the segment display. Download the program…

zynq xc7z030 board – FII-PE7030 Experiment 10 -Sent data received on the host computer

Experimental Manuals FII-PE7030 FPGA Board Based FPGA Products FPGA Tutor

zynq xc7z030 board – FII-PE7030 Experiment 10 – Asynchronous Serial Port Design and Experiment

January 7, 2020 SteveGuysAsynchronous Serial Port Design and Experiment, FII-PE7030, FPGA development, zynq xc7z030 board

10.1 Experiment Objective Because asynchronous serial ports are very common in industrial control, communication, and software debugging, they are also vital in FPGA development. Study the basic principles of asynchronous serial port communication, handshake mechanism, data frame Master asynchronous sampling techniques Review the frame structure of the data packet Learning FIFO Joint debugging with common debugging software of PC (SSCOM, teraterm, etc.) 10.2 Experiment Implement Design and transmit full-duplex asynchronous communication interface Tx, Rx Baud rate of 11520 bps, 8-bit data, 1 start bit, 1 or 2 stop bits Receive…

Experimental Manuals FII-PE7030 FPGA Board Based FPGA Products FPGA Tutor

zynq xc7z030 board – FII-PE7030 Experiment 9 – Use Dual-port RAM to Read and Write Frame Data

January 7, 2020 SteveGuysDual-port RAM, Experiment, FII-PE7030, Frame Data, Use Dual-port RAM to Read and Write Frame Data, zynq xc7z030 board

Experiment 9 Use Dual-port RAM to Read and Write Frame Data 9.1 Experiment Objective Learn to configure and use dual-port RAM Learn to use synchronous clock to control the synchronization of frame structure Learn to use asynchronous clock to control the synchronization of frame structure Use ILA to observe the structure of a synchronized clock frame Extended the use of dual-port RAM Design the use of three-stage state machine Experiment Implement Use ILA to observe the structure of a synchronized clock frame Extended the use of dual-port RAM Design the…