Embedded System

Building new FPGA projects in Quartus, device selection, PLL setup, PLL frequency setting, Verilog’s tree hierarchy design, and the use of SignalTap II – FPGA Board for Beginner – Experiment 4 -PRA006

July 3, 2019June 26, 2020 SteveGuysBCD_counter display of the digital clock, Block/ Schematic Test, FPGA Board for Beginner, PRA006, use of SignalTap, Verilog HDL’s tree hierarchy design

Experiment 4 Block/SCH Experiment 4.1 Experiment Objective Review building new FPGA projects in Quartus, device selection, PLL setup, PLL frequency setting, Verilog’s tree hierarchy design, and the use of SignalTap II Master the design method of graphics from top to bottom Combined with the BCD_counter project to achieve the display of the digital clock Observe the experimental results 4.2 Experiment Implement Use schematics design to build the project 4.3 Experiment This experiment is mainly to master another design method. The other design contents are basically the same as the…

FPGA for Beginners FPGA Tutor Pocket Boards

BCD_counter, The segment decoder code, Download the program into the board flash memory – FPGA for Beginner Tutorial – Experiment 3 – FII-PRA006

July 3, 2019June 26, 2020 SteveGuysBCD_counter, Download the program into the board flash memory, PCB Schematics, The segment decoder code

Experiment 3 Segment Display 3.1 Experiment Objective Review previous experiments, proficient practice in PLL configuration, frequency division design, and project verification; Learn to use the BCD code counter; Digital display decoding design; Learn to program the project into the serial FLASH of the development board; 3.2 Experiment Implement The segment display has two lower (right most) digits to display seconds, the middle two digits to display minutes, and the highest (left most) two digits to display hours. The decimal point remains off and will not be considered for the…

FPGA for Beginners FPGA Tutor Pocket Boards PRA006/PRA010

Switch and Use SignalTap II Logic Analyzer in Quartus ( Verilog HDL code ), Learn to analyze the captured signals – FPGA for Beginner Tutorial – Experiment 2 – FII-PRA006

July 3, 2019June 26, 2020 SteveGuysLogic Analyzer, Quartus II, SignalTap II, Switch, switch schematics, Verilog HDL code

2.1 Experiment Objective Continue to practice using the develop board Use SignalTap II Logic Analyzer in Quartus Use FPGA configuration memory to program 2.2 Experiment Requirement By using SignalTap II, learn to analyze and capture the experimental signals. 2.3 Experiment 2.3.1 Project Building Refer to Experiment1, the following experiment project building steps will be eliminated. 2.3.2 PCB Schematics 2.3.3 Experiment Procedure We include the PLL1 generated in Experiment 1 Verilog HDL code is as follows: 2.3.4 SignalTap II Logic Analyzer Step 1: SignalTap II startup and basic setup Tools >…

FPGA for Beginners FPGA Tutor Pocket Boards

LED_shifting , Frequency Divider Verilog HDL Code using the development software Quartus, FPGA pin assignment – FPGA Board Beginner Tutorial – FII-PRA006 Experiment 1

June 25, 2019June 26, 2020 SteveGuysExperiment, FPGA Board Beginner, LED_shifting, LED_shifting Verilog Code, LEDs

Experiment 1 LED shifting 1.1 Experiment Objective Practice using the development software Quartus, the building of new projects, and the use of system resources IP Core; Proficiency practice in the writing of Verilog HDL programs to develop a fine code writing style; Master the design of the frequency divider to realize the design of LED shifting; Mange FPGA pin assignment according to the schematics, and verify it though programming the development board; Observe and summarize the experiment result 1.2 Experiment Implement All LEDs are lit up when pressing self-defined reset…

FPGA Board Based FPGA for Beginners Pocket Boards

FPGA Board for Beginner

April 19, 2019November 17, 2020 SteveGuysFPGA, FPGA for Beginner, Jtag, verilog, VGA Video Interface, VHDL

FPGA for Beginners A field-programmable gate array (FPGA) is an integrated circuit designed to be configured by a customer or a designer after manufacturing – hence the term “field-programmable”. The FPGA configuration is generally specified using a hardware description language (HDL), similar to that used for an Application-Specific Integrated Circuit (ASIC). Circuit diagrams were previously used to specify the configuration, but this is increasingly rare due to the advent of electronic design automation tools. FII was founded on making FPGA technology more approachable for students or FPGA beginners to learn. We partnered with the world leader and founder of modern day FPGA technology,…

FPGA Board Based RF Transceivers

Analog Devices AD9361 RF Agile Transceiver™ and AD9361 Development Board

January 2, 2019December 10, 2020 SteveGuysad9361, ad9361 development board, AD9361 RF Agile Transceiver

FII-BD9361 – AD9361 Software Development Kit using the AD9361 RF Agile Transceiver – $379 AD9361 Development Board – Perfectly compatible with AD-FMCOMMS3-EBZ – Code compatible, development tool compatible, performance compatible, Smaller size and more space saving The FII-BD9361 is a high-speed analog module designed to showcase the AD9361, a high performance, highly integrated RF transceiver intended for use in RF applications, such as 3G and 4G base station and test equipment applications, and software defined radios. Its program-ability and wide-band capability make it ideal for a broad range of…