Embedded System

LED shifting, Using Quartus, the Writing of Verilog HDL programs, Mange FPGA Pin Assignment – FPGA Beginner Study Board PRA006, PRA010 Experiment 1

November 16, 2020February 23, 2021 SteveGuysFPGA, FPGA Begiiner Board, FPGA Study Board, HDL programs, LED shifting, Mange FPGA Pin Assignment, PRA006, PRA010, Schematics of LED, Using Quartus, verilog

Experiment 1 LED shifting 1.1 Experiment Objective Practice using the development software Quartus, the building of new projects, and the use of system resources IP Core; Proficiency practice in the writing of Verilog HDL programs to develop a fine code writing style; Master the design of the frequency divider to realize the design of LED shifting; Mange FPGA pin assignment according to the schematics, and verify it though programming the development board; Observe and summarize the experiment result 1.2 Experiment Implement All LEDs are lit up when pressing self-defined reset…

Experimental Manuals FPGA for Beginners FPGA Tutor Pocket Boards PRA006/PRA010

FPGA for Beginner Board Experimental Manuals and Study Guide – PRA006, PRA010 FPGA Beginner Study Board

November 12, 2020December 3, 2020 beginner FPGA

Fraser Innovation Inc FII-PRA006/010 User Experimental Manual Version Control Version Date Descrption V1.0 10/07/2019 Initial Release V1.1 12/07/2019 Add figures for corresponding experimental phonomena of experiment board V1.2 30/08/2019 Modify part of pin assignments and Ethernet description Project Files Content Experiment 1: LED_shifting Experiment 2: SW_LED Experiment 3: BCD_counter Experiment 4: block_counter Experiment 5: block_debouncing Experiment 6: mult_sim Experiment 7: HEX_BCD, HEX_BCD_mult Experiment 8: memory_rom Experiment 9: dual_port_ram Experiment 10: UART_FRAME Experiment 11: eeprom_test Experiment 12: adda_test Experiment 13: vga Experiment 14: Ethernet Part One: Introduction to FII-PRA006/010…

FII RISC-V3.01 CPU FII-PRA040 FII-PRX100-S FII-PRX100D PRX100 Risc-V Risc-V Core Risc-V Tutorial

C Programming (2) on RISCV FII-PRX100 (ARTIX-7, XC7A100T) XILINX FPGA Board with our FII-Risc-V CPU (RV32G2.0)

November 9, 2020February 24, 2021 beginner FPGACreate a new C project, FII-Risc-V CPU, FPGA Board, RISCV_seg_irq Project

V1.0 Fraser Innovation inc RISCV FII-PRX100 (ARTIX-7, XC7A100T) XILINX FPGA Board C Programming 2 Version Control Version Date Description 1.0 10/17/2020 Initial Release Copyright Notice: © 2020 Fraser Innovation Inc ALL RIGHTS RESERVED Without written permission of Fraser Innovation Inc, no unit or individual may extract or modify part of or all the contents of this manual. Offenders will be held liable for their legal responsibility. Thank you for purchasing the FPGA development board. Please read the manual carefully before using the product and make sure that you know how…

FII RISC-V3.01 CPU FII-PRX100-S FII-PRX100D FPGA Board Based FPGA Tutor PRX100 Risc-V Risc-V Core Risc-V Tutorial

C Programming (1) on RISCV FII-PRX100 (ARTIX-7, XC7A100T) XILINX FPGA Board with our FII-Risc-V CPU (RV32G2.0)

November 9, 2020November 9, 2020 beginner FPGA32 registers, ARTIX-7, C Project Compilation Process, CPU, FII-PRX100, FII-RISCV CPU, Freedom Studio, Linker functionality, XC7A100T, XILINX FPGA Board

V1.0 Fraser Innovation inc RISCV FII-PRX100 (ARTIX-7, XC7A100T) XILINX FPGA Board C Programming 1 Version Control Version Date Description 1.0 10/24/2020 Initial Release Copyright Notice: © 2020 Fraser Innovation Inc ALL RIGHTS RESERVED Without written permission of Fraser Innovation Inc, no unit or individual may extract or modify part of or all the contents of this manual. Offenders will be held liable for their legal responsibility. Thank you for purchasing the FPGA development board. Please read the manual carefully before using the product and make sure that you know how…

FII RISC-V3.01 CPU FII-PRX100-S FII-PRX100D PRX100 Risc-V Risc-V Core Risc-V Tutorial

Risc-V Bus and PipeLine – FII Risc-V Bus and Pipeline Design – Risc-V Tutorial and Exercise

November 9, 2020November 9, 2020 beginner FPGABus, FII Risc-V Bus and Pipeline Design, PipeLine, Risc-V, Risc-V Exercise, Risc-V Tutorial

V1.0 Fraser Innovation inc RISCV FII-PRX100 (ARTIX-7, XC7A100T) XILINX FPGA Board Bus and Pipeline Version Control Version Date Description 1.0 10/28/2020 Initial Release Copyright Notice: © 2020 Fraser Innovation Inc ALL RIGHTS RESERVED Without written permission of Fraser Innovation Inc, no unit or individual may extract or modify part of or all the contents of this manual. Offenders will be held liable for their legal responsibility. Thank you for purchasing the FPGA development board. Please read the manual carefully before using the product and make sure that you know how…

Experimental Manuals FII RISC-V3.01 CPU FII-PRX100-S FII-PRX100D PRX100 Risc-V Risc-V Core Risc-V Tutorial

FII RISC-V3.01 CPU Processor on FII-PRX100-S (ARTIX-7, XC7A100T) XILINX FPGA Board Evaluation by Coremark and Dhrystone Benchmarks

October 8, 2020November 9, 2020 SteveGuysARTIX-7, CPU Processor, FII RISC-V3.01, FII RISC-V3.01 CPU Processor, FII-PRX100-S, XC7A100T, XILINX FPGA Board Evaluation

V1.1 Fraser Innovation inc FII RISC-V3.01 on FII-PRX100-S (ARTIX-7, XC7A100T) XILINX FPGA Board Evaluation Version Control Version Date Description 1.0 09/29/2020 Initial Release 1.1 10/07/2020 Add Description of PRX100 and Comparison Plots Copyright Notice: © 2020 Fraser Innovation Inc ALL RIGHTS RESERVED Without written permission of Fraser Innovation Inc, no unit or individual may extract or modify part of or all the contents of this manual. Offenders will be held liable for their legal responsibility. Thank you for purchasing the FPGA development board. Please read the manual carefully before using…

Experimental Manuals FII RISC-V3.01 CPU FII-PRX100-S FII-PRX100D PRX100 Risc-V Risc-V Core Risc-V Tutorial

Dhrystone Porting Guide For FII RISC-V3.01 CPU Processor on FII-PRX100-S (ARTIX-7, XC7A100T) XILINX FPGA Board

October 8, 2020January 19, 2021 SteveGuysARTIX-7, CPU Processor, Dhrystone Porting Guide, FII-PRX100-S, Risc-V Processor, RISC-V3.01 CPU Processor, XC7A100T, XILINX FPGA Board

V1.1 Fraser Innovation inc Dhrystone Porting Guide For FII RISC-V3.01 on FII-PRX100-S (ARTIX-7, XC7A100T) XILINX FPGA Board Version Control Version Date Description 1.0 09/29/2020 Initial Release 1.1 10/07/2020 Add Description of PRX100 and Comparison Plot Copyright Notice: © 2020 Fraser Innovation Inc ALL RIGHTS RESERVED Without written permission of Fraser Innovation Inc, no unit or individual may extract or modify part of or all the contents of this manual. Offenders will be held liable for their legal responsibility. Thank you for purchasing the FPGA development board. Please read the manual…

Experimental Manuals FII RISC-V3.01 CPU FII-PRX100-S FII-PRX100D FPGA Board Based PRX100 Risc-V Core Risc-V Tutorial

FII RISC-V3.01 CPU Processor on FII-PRX100-S (ARTIX-7, XC7A100T) XILINX FPGA Board Coremark Porting Guide

October 8, 2020February 1, 2021 SteveGuysCoremark Porting, CPU Processor, FII-PRX100-S, Risc-V, RISC-V3.01, XILINX FPGA Board

V1.1 Fraser Innovation inc FII RISC-V3.01 on FII-PRX100-S (ARTIX-7, XC7A100T) XILINX FPGA Board Coremark Porting Guide Version Control Version Date Description 1.0 09/29/2020 Initial Release 1.1 10/06/2020 Add Comparison Figure and Full Description of PRX100 Copyright Notice: © 2020 Fraser Innovation Inc ALL RIGHTS RESERVED Without written permission of Fraser Innovation Inc, no unit or individual may extract or modify part of or all the contents of this manual. Offenders will be held liable for their legal responsibility. Thank you for purchasing the FPGA development board. Please read the manual…

Experimental Manuals FII-PRX100-S FII-PRX100D FPGA Board Based PRX100 Risc-V

Xinlix Risc-V Board PRX100-S, PRX100-D Experimental Manuals (2019-12-19 Version ) with twenty experiments

October 3, 2020November 9, 2020 SteveGuysExperimental Manuals, PRX100-D, PRX100-S, Risc-V Board, Xinlix

Xinlix Risc-V Board PRX100-S, PRX100-D Experimental Manuals (2019-12-19 Version ) with twenty experiments

Experimental Manuals FII-PRX100-S FII-PRX100D FPGA Board Based FPGA Tutor PRX100 Risc-V

DAC9767 DDS Signal Source Experiment – Xilinx Risc-V Board FII-PRX100 Experiment 20

October 3, 2020 SteveGuysAD9767 datasheet, DDS Introduction, DDS Signal Source Experiment, Direct Digital Synthesizer)

Experiment 20 DAC9767 DDS Signal Source Experiment 20.1 Experiment Objective Learn about DDS (Direct Digital Synthesizer) related theoretical knowledge. Read the AD9767 datasheet and use the AD9767 to design a signal source that can generate sine, square, triangle, and sawtooth waves. 20.2 Experiment Implement Learn about DDS theoretical knowledge. On the basis of understanding the principle of DDS, combined with the theoretical knowledge, use AD9767 module and development board to build a signal source whose waveform, amplitude and frequency can be adjusted. (There are no specific requirements for the adjustment…