Pocket Boards - Part 2

Design 16 outputs ROM, Study the format of .mif and how to edit .mif file to configure the contents of ROM, Use of ROM (Read-only Memory) – FPGA Board for Beginner Tutorial – Experiment 8

decode, Design 16 outputs ROM, Dual_port RAM, Frame Data, segment display, the internal memory block, Use of ROM

Experiment 8 Use of ROM 8.1 Experiment Objective Study the internal memory block of FPGA Study the format of *.mif and how to edit *.mif file to configure the contents of ROM Learn to use RAM, read and write RAM 8.2 Experiment Implement Design 16 outputs ROM, address ranging 0-255 Interface 8-bit switch input as ROM’s address Segment display illustrates the contents of ROM and require conversion of hexadecimal to BCD output. 8.3 Experiment 8.3.1 Introduction to Program This experiment was carried out on the basis of Experiment 7, and…

FPGA for Beginners FPGA Tutor Pocket Boards PRA006/PRA010

Hexadecimal Numbers to BCD Code(hex_to_bcd), binary numbers to BCD code (bin_to_bcd) Conversion and Application – FPGA Board for Beginner Tutorial – Experiment 7

BCD Code, bin_to_bcd, binary numbers to BCD code, hex_to_bcd, Hexadecimal Numbers

Experiment 7 Hexadecimal Number to BCD Code Conversion and Application Experiment Objective Learn to convert binary numbers to BCD code (bin_to_bcd) Learn to convert hexadecimal numbers to BCD code (hex_to_bcd) 7.2 Experiment Implement Combined with experiment 6, display the results of the operation to the segment display. 7.3 Experiment 7.2.1 Introduction to the Principle of Converting Hexadecimal Number to BCD Code Since the hexadecimal display is not intuitive, decimal display is more widely used in real life. Human eyes recognition is relatively slow, so the display from hexadecimal to decimal…

FPGA for Beginners FPGA Tutor Pocket Boards

Learn to Use Multiplier and ModelSim to Output- FPGA Board for Beginner – FPGA Tutorial – Experiment 6

Modelsim, multiplier

Experiment 6 Use of Multipliers and ModelSim Simulation 6.1 Experiment Objective Learn to use multiplier Use ModelSim simulation to design output 6.2 Experiment Implement 8×8 multiplier, the first input value is an 8-bit switch, and the second input value is the output of an 8-bit counter. Observe the output in ModelSim Oberseve the calculation results with a four-digit segment display 6.3 Experiment Since the simulation tools and the new IP core are used here, there is no introduction or design part of hardware. 6.3.1 Introduction of Program ModelSim is an…

FPGA for Beginners FPGA Tutor Pocket Boards

Block_Debouncing Principle and adaptive programming, PCB schematics, and Verilog HDL Code – FBGA Board for beginner FPGA tutorial – Experiment 5

Block_Debouncing Principle, Button bounce principle, Button debounce flow chart, Button PCB schematics, LED symbol, running LED design, the button debounce, Verilog HDL code

Experiment 5 Button Debounce Experiment 5.1 Experiment Objective Review the design process of the shifting LED Learn button debounce principle and adaptive programming Study the connection and use of the FII-PRA006/010 button hardware circuit Comprehensive application button debounce and other conforming programming 5.2 Experiment Implement Control the movement of the lit LED by pressing the button Each time the button is pressed, the lit LED moves one bit. When the left shift button is pressed, the lit LED moves to the left, presses the right button, and the lit…

FPGA Board Based FPGA for Beginners FPGA Tutor Pocket Boards

Building new FPGA projects in Quartus, device selection, PLL setup, PLL frequency setting, Verilog’s tree hierarchy design, and the use of SignalTap II – FPGA Board for Beginner – Experiment 4 -PRA006

BCD_counter display of the digital clock, Block/ Schematic Test, FPGA Board for Beginner, PRA006, use of SignalTap, Verilog HDL’s tree hierarchy design

Experiment 4 Block/SCH Experiment 4.1 Experiment Objective Review building new FPGA projects in Quartus, device selection, PLL setup, PLL frequency setting, Verilog’s tree hierarchy design, and the use of SignalTap II Master the design method of graphics from top to bottom Combined with the BCD_counter project to achieve the display of the digital clock Observe the experimental results 4.2 Experiment Implement Use schematics design to build the project 4.3 Experiment This experiment is mainly to master another design method. The other design contents are basically the same as the…

FPGA for Beginners FPGA Tutor Pocket Boards

BCD_counter, The segment decoder code, Download the program into the board flash memory – FPGA for Beginner Tutorial – Experiment 3 – FII-PRA006

BCD_counter, Download the program into the board flash memory, PCB Schematics, The segment decoder code

Experiment 3 Segment Display 3.1 Experiment Objective Review previous experiments, proficient practice in PLL configuration, frequency division design, and project verification; Learn to use the BCD code counter; Digital display decoding design; Learn to program the project into the serial FLASH of the development board; 3.2 Experiment Implement The segment display has two lower (right most) digits to display seconds, the middle two digits to display minutes, and the highest (left most) two digits to display hours. The decimal point remains off and will not be considered for the…

FPGA for Beginners FPGA Tutor Pocket Boards PRA006/PRA010

Switch and Use SignalTap II Logic Analyzer in Quartus ( Verilog HDL code ), Learn to analyze the captured signals – FPGA for Beginner Tutorial – Experiment 2 – FII-PRA006

Logic Analyzer, Quartus II, SignalTap II, Switch, switch schematics, Verilog HDL code

2.1 Experiment Objective Continue to practice using the develop board Use SignalTap II Logic Analyzer in Quartus Use FPGA configuration memory to program 2.2 Experiment Requirement By using SignalTap II, learn to analyze and capture the experimental signals. 2.3 Experiment 2.3.1 Project Building Refer to Experiment1, the following experiment project building steps will be eliminated. 2.3.2 PCB Schematics 2.3.3 Experiment Procedure We include the PLL1 generated in Experiment 1 Verilog HDL code is as follows: 2.3.4 SignalTap II Logic Analyzer Step 1: SignalTap II startup and basic setup Tools >…

FPGA for Beginners FPGA Tutor Pocket Boards

LED_shifting , Frequency Divider Verilog HDL Code using the development software Quartus, FPGA pin assignment – FPGA Board Beginner Tutorial – FII-PRA006 Experiment 1

Experiment, FPGA Board Beginner, LED_shifting, LED_shifting Verilog Code, LEDs

Experiment 1 LED shifting 1.1 Experiment Objective Practice using the development software Quartus, the building of new projects, and the use of system resources IP Core; Proficiency practice in the writing of Verilog HDL programs to develop a fine code writing style; Master the design of the frequency divider to realize the design of LED shifting; Mange FPGA pin assignment according to the schematics, and verify it though programming the development board; Observe and summarize the experiment result 1.2 Experiment Implement All LEDs are lit up when pressing self-defined reset…

FPGA Board Based FPGA for Beginners Pocket Boards

FPGA Board for Beginner

FPGA, FPGA for Beginner, Jtag, verilog, VGA Video Interface, VHDL

FPGA for Beginners A field-programmable gate array (FPGA) is an integrated circuit designed to be configured by a customer or a designer after manufacturing – hence the term “field-programmable”. The FPGA configuration is generally specified using a hardware description language (HDL), similar to that used for an Application-Specific Integrated Circuit (ASIC). Circuit diagrams were previously used to specify the configuration, but this is increasingly rare due to the advent of electronic design automation tools. FII was founded on making FPGA technology more approachable for students or FPGA beginners to learn. We partnered with the world leader and founder of modern day FPGA technology,…